REV. 0

AD723

–14–

Basic Connections

Some simple applications will not require use of all of the fea-

tures of the AD723. In such a case, some of the pins must be

connected to appropriate levels such that the rest of the device

can operate. Figure 7 is a schematic of a very basic connection

of the AD723.

4FSC

14.31818MHz-NTSC

17.734475MHz-PAL

BIN

HSYNC

VSYNC

RT

GT

BT

NC

NC

NC

HSYNC AND VSYNC OR

CSYNC AND POLARITY

(SEE TEXT)

GIN

AGND

DGND

RIN

DVDD

STND

YTRAP

AVDD

AVDD1

SA

CE

TERM

TGND

AGND

YSET

Y

CSET

C

CVSET

CV

TVDET

AD723

0.1 F

10 F

+

3V

0.1 F10 F

+

3V

0.1 F

3V

TO 75

TEMINATION

NC

NC

TO 75

TEMINATION

TO 75

TEMINATION

374

301

374

301

374

301

HIGH FOR NTSC

LOW FOR PAL

3V

R, G, B

FROM

75

SOURCE

0.1 F

75

75

75

NC = NO CONNECT

0.1 F

0.1 F

Figure 7. Basic Connection (Using Direct Input

Termination)

The following pins do not require any connection and can be

left open circuited if their function is not needed:

Pin 9, RT

Pin 10, GT

Pin 11, BT

Pin 18, TVDET

Pin 21, YTRAP

Inputs to a CMOS device should never be left floating, even if

their function is ignored. The following inputs should be dealt

with accordingly:

Pin 1, STND—can be hard-wired either high or low, if only

either NTSC or PAL output is desired.

Pin 2, SA—For most systems, this pin should be tied low (ground).

Some of the video standards used in South America can be

enabled by a high logic level on this pin.

Pin 3, CE—If continuous enabled operation is desired, this pin

can be hard-wired to a high logic level.

Pin 4, TERM—This signal should be tied low (ground) if the

on-chip termination switches are not used.

Most systems will use only one output type at a time—either

composite video or S-video. In such a case, it is desirable that

unused outputs go to their power-down state. The only compo-

nent necessary for these outputs is a resistor of 300

Ω from the

appropriate XSET pin to ground. If no load is detected on the

output pin, the corresponding output stage will be powered

down to minimum current.

PC Graphics Interface

The AD723 has an extended feature set that simplifies the task

of generating composite TV output signals from a PC from the

conventional RGB and sync outputs. In order for this to function,

however, the RGB output scanning must be interlaced and at the

proper scanning frequencies for either NTSC or PAL operation.

Figure 8 shows the connections for interfacing to a PC graphics

chipset. The RGB signals now must serve two different destina-

tions and two different termination conditions.

There is a direct path from the RGB signals to the RGB moni-

tor. This is the conventional path, and the presence of the AD723

should not interfere with it. The RGB signals are doubly shunt-

terminated by the 75

Ω resistors near the graphics chip and the

75

Ω terminations in the monitor. This situation does not require

any additional termination, so the TERM pin of the AD723

should be low so that the termination switches are turned off.

If the TV output is desired, there are two possibilities: either the

RGB monitor will be plugged in or, since it is not necessary, it

can be removed. The case where it is plugged in has the same

termination scheme as above, so the TERM signal should be

low to prevent switching in any additional termination.

However, if the RGB monitor is unplugged, there is only one set

of shunt terminations on the RGB signals. In this case, TERM

should be switched high (3 V). This will provide the second termi-

nation by switching the three 75

Ω resistors to ground.

General-purpose outputs (GPO) are used from the I/O control-

ler device to control the logic inputs to the AD723: TERM, CE,

SA, and STND. Any of these can be hardwired in the desired

state if it is not going to be changed in normal operation. A

general-purpose input (GPI) can be used to monitor TVDET if

this feature is used.

The RGB signals are ESD-protected by the diodes to the sup-

plies. The Pi networks on these signal lines prevent EMI from

radiating from the monitor cable.

Low Cost Crystal Oscillator

A low cost oscillator can be made that provides a CW clock that

can be used to drive both the AD723 4FSC and other devices in

the system that require a clock at this frequency. Figure 9 shows

a circuit that uses one inverter of a 74HC04 package to create a

crystal oscillator and another inverter to buffer the oscillator and

drive other loads. The logic family must be a CMOS type that

can support the frequency of operation, and it must NOT be a

Schmitt trigger type of inverter. Resistor R1 from input to out-

put of U1A linearizes the inverter’s gain such that it provides

useful gain and a 180 degree phase shift to drive the oscillator.