AD7112

REV. 0

–4–

ABSOLUTE MAXIMUM RATINGS*

±25 V

Operating Temperature Range

All Versions . . . . . . . . . . . . . . . . . . . . . . . . –40

°C to +85°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150

°C

Storage Temperature . . . . . . . . . . . . . . . . . –65

°C to +150°C

Power Dissipation, DIP . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W

θ

. . . . . . . . . . . . . . . . . . . . . 102

°C/W

Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300

°C

Power Dissipation, SOIC . . . . . . . . . . . . . . . . . . . . . . . . . 1 W

θ

. . . . . . . . . . . . . . . . . . . . . . 75

°C/W

Lead Temperature (Soldering)

Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . . . 215

°C

Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220

°C

*Stresses above those listed under “Absolute Maximum Ratings” may cause

permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those listed in the

operational sections of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability. Only

one Absolute Maximum Rating may be applied at any one time.

WARNING!

ESD SENSITIVE DEVICE

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the AD7112 features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

TERMINOLOGY

RESOLUTION: Nominal change in attenuation when moving

between two adjacent codes.

MONOTONICITY: The device is monotonic if the analog out-

put decreases or remains constant as the wdigital code in-

creases.

FEEDTHROUGH ERROR: That portion of the input signal

which reaches the output when all digital inputs are high.

OUTPUT CAPACITANCE: Capacitance from OUT A or

OUT B to ground.

GAIN ERROR: Gain error results from a mismatch between

Its effect in a LOGDAC is to produce a constant additive at-

tenuation error in dB over the whole range of the DAC.

ACCURACY: The difference (measured in dB) between the

ideal transfer function as listed in Table I and the actual trans-

fer function as measured with the device.

DIGITAL-TO-ANALOG GLITCH IMPULSE: The amount

of charge injected from the digital inputs to the analog output

when the inputs change state. This is normally specified as the

area of the glitch in either pA-s or nV-s depending on whether

the glitch is measured as a current or voltage signal. Glitch im-

ORDERING INFORMATION

Specified

Temperature

Accuracy

Package

Model

Range

Range

Option*

AD7112BN

–40

°C to +85°C

0 dB to 60 dB

N-20

AD7112CN

–40

°C to +85°C

0 dB to 72 dB

N-20

AD7112BR

–40

°C to +85°C

0 dB to 60 dB

R-20

AD7112CR

–40

°C to +85°C

0 dB to 72 dB

R-20

*N = Plastic DIP; R = SOIC.

PIN FUNCTION DESCRIPTION

Pin

Mnemonic

Description

1

AGND

Analog Ground.

2

OUT A

Current Output Terminal of DAC A.

Feedback Resistor for DAC A.

Reference Input to DAC A

5

DGND

Digital Ground.

6

DAC A

/

Selects Which DAC Can Accept Data from

DAC B

Input Port.

7–14 DB7–DB0

8 Data Inputs.

15

CS

Chip Select Input, Active Low.

16

WR

Write Input, Active Low.

17

Power Supply Input 5 V

± 5%.

18

Reference Input to DAC B.

19

Feedback Resistor for DAC B.

20

OUT B

Current Output Terminal of DAC B.

PIN CONFIGURATION

DIP/SOIC

AGND

OUT A

DGND

(MSB) DB7

DAC A/DAC B

DB6

DB5

DB4

OUT B

DB0 (LSB)

DB1

DB2

DB3

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

TOP VIEW

(Not to Scale)

AD7112

WR

CS