ALT6725P9 datasheet(6/13 Pages) ANADIGICS

6 / 13 page

PRELIMINARY DATA SHEET - Rev 1.0

07/2012

ALT6725

Table 6: Electrical Specifications – LTE Operation (Band 2 & 25) (10 MHz QPSK, 12 RB, START = 0)

(TC = +25 °C, VBATT = VCC = +3.4 V, VEN = +1.8 V, 50 Ω system)

PARAMETER

MIN

TYP

MAX

UNIT

COMMENTS

POUT

VMODE1

VMODE2

Gain

+27.3 dBm

+15 dBm

+9 dBm

0 V

1.8 V

0 V

1.8 V

ACLR E-UTRA at ± 10 MHz offset

-37.5

-41

-40

dBc

+27.3 dBm

+15 dBm

+9 dBm

0 V

1.8 V

0 V

1.8 V

ACLR UTRA at ± 7.5 MHz offset

-38

-41

dBc

+27.3 dBm

+15 dBm

+9 dBm

0 V

1.8 V

0 V

1.8 V

ACLR UTRA at ± 12.5 MHz offset

-63

-64

dBc

+27.3 dBm

+15 dBm

+9 dBm

0 V

1.8 V

0 V

1.8 V

Power-Added Efficiency (1)

+27.3 dBm

+15 dBm

+9 dBm

0 V

1.8 V

0 V

1.8 V

Quiescent Current (Icq)

Low Bias Mode

through VCC

1.8 V

Mode Control Current

0.5

through VMODE pins, VMODE1,2 = +1.8 V

BATT Current

1.5

through VBATT, VMODE1,2 = +1.8 V

Enable Current

0.3

through VEN_PCS, VMODE1,2 = +1.8 V

Total Decoder Current on

VBATT (in Shutdown mode)

µA

VBATT = +4.35 V, VCC = +4.35 V,

VEN_CELL = 0 V, VMODE1,2 = 0 V

HBT Leakage Current (VCC)

(Shutdown mode)

VBATT = +4.35 V, VCC = +4.35 V,

VEN_CELL = 0 V, VMODE1,2 = 0 V

Noise in Receive Band

-133

dBm/Hz 1930 MHz to 1990 MHz

Harmonics

2fO

3fO, 4fO

-30

dBc

POUT < +27.3 dBm

Input Impedence

2:1

VSWR

Coupling Factor

Spurious Output Level

(all spurious outputs)

-65

dBc

POUT < +27.3 dBm

In-band load VSWR < 5:1

Out-of-band load VSWR < 10:1

Applies over all operating conditions

Load mismatch stress with no

permanent degradation or failure

8:1

VSWR Applies over full operating range

Notes:

(1) ACLR and Efficiency measured at 1880 MHz.

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