REV PrA

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a

2 Pair/1 Pair ETSI Compatible

HDSL Analog Front End

PreliminaryTechnicalData

AD5011

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

Fax: 781/326-8703

World Wide Web Site: hppt://www.analog.com

FEATURES

Integrated front End for Single Pair or Two Pair HDSL

Systems

Meets ETSI Specifications

Supports 1168 kbps and 2.32 Mbps

Programmable Filtering Supports Adaptive HDSL

Transmit and Receive Signal Path Functions

Receive Hybrid Amplifier, PGA, ADC and Adaptable

Filter

Transmit DAC, Adaptable Filter and Differential

Outputs

Normal Loopback

Serial Interface to Digital Transceivers

Single 3 V Power Supply

FUNCTIONAL BLOCK DIAGRAM

GENERAL DESCRIPTION

The AD5011 is an analog front end for two pair or single

pair HDSL applications that use 1168 kbps or 2.32 Mbps

data rates.

The device integrates all the transmit and receive

functional blocks.

A standard serial interface is used to

communicate with the DAC and ADC.

The filters in both

the transmit and receive paths are programmable which

allows adaptive HDSL to be performed also.

The part is

available in a 48-pin LQFP package and is specified for a

temperature range of -40

14-B it D A C

6 Pole Ada ptive

B esse l Filte r

PG A

Line

Drive r

Hybrid

PG A

4 Pole Ada ptive

B utterw orth Filter

AD C

Buffer

12-B it A D C

SPI

SPICLK

TFS

DT

DR

RE SETB

PW R D O W NB

TxD A TA

TxSY N C

TxC LK

AD CCLK

SC L K

SD O

DR

CA P-T

CA P-B

RE F -C O M

VR EF

Tx-D EC O U P

DR V-OUT P

H YBIN-2 B

0 dB

-6 dB

-6 dB

-3 dB

0 dB

+3 d B

+6 d B

DR V-OUT N

H YBIN-2 A

H YBIN-1 A

H YBIN-1 B

VD RIVE

CM -L VL

Con trol/

C onfiguratio n

PRELIMINARY TECHNICAL DATA