–6–

REV. A

AD2S93

+VE POSITION

FULL SCALE

–VE POSITION

FULL SCALE

NULL

POSITION

OUTPUT CODES

MAGNITUDE

0100

0000

0000

0000

0100

1111

1111

1111

0100

0000

0000

0000

0000

0000

0000

0001

0000

1111

1111

1111

0001

0000

0000

0000

0001

0000

0000

0001

0001

1111

1111

1110

0001

1111

1111

1111

0011

0000

0000

0000

0011

0000

0000

0001

0011

1111

1111

1111

RANGE

OVER-

RANGE

–1

0

≠ 1

RATIO OF A- B/REF/2

A – B = – REF/2

A – B = + REF/2

A – B = 0

UNDER-

RANGE

LOS

OVR

UNR

SIGN

Figure 2. Output Code Format

If the maximum operating stroke of an LVDT yielded a 1 V rms

A–B output, the weighting of the LVDT to AD2S93 digital out-

put would be:

Input Signal Full Scale

Full-Scale Operating Range (

1

× 22

2

13

Input Scaling

= 345 µV/LSB

This can be equated directly to the LVDT sensitivity specifica-

tion in mm/v/v.

Note: The overrange and underrange quadrants can be utilized

by decoding the overrange and underrange MSBs and decoding

the 12 magnitude bits. This will increase the operating range of

then the converter will lose track of the input and will only re-

gain track when the input signal returns to within the operating

range of the converter.

INPUT GAIN

Since the transformation ratio of an LVDT or RVDT from exci-

tation voltage to signal voltage can be 1:0.15, provision for gain

scaling has been provided. The gain can, therefore, be selected

to ensure that the full-scale output of converter represents the

maximum stroke position of the transducer.

The gain setting is accomplished by connecting Pin 2, (DIFF)

and Pin 3 (GAIN) together (unity gain) or connecting two resis-

tors as shown in Figure 3.

The gain of the input stage is calculated using the following

equation:

DIFF ( A – B)

( A – B) IN

= 1+

R

3

R

4

e.g., For a gain of 5, R3 = 12 k

Ω, R4 = 3 kΩ

For a gain of 10, R3 = 18 k

Ω, R4 = 2 kΩ

AGND

R4

R3

GAIN

DIFF

A

B

Figure 3. Pre-Amp Gain Block

SETTING THE CONVERTER BANDWIDTH

The AD2S93 bandwidth is set by placing three external compo-

nents, C1, C2, and R2, around the integrator as illustrated by

the figure below.

R1

C2

C1

R2

62.5

VCO

INT

Figure 4. Integrator and VCO

Before the bandwidth can be set, the corresponding VCO gain

setting must be determined. The VCO gain is directly related to

the slew rate of the converter. This is set internally to two dif-

Typical converter slew rates are defined below,

G (1) = 2400 LSB/ms–Mode 1

G (2) = 800 LSB/ms–Mode 2