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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AD1317KZ датащи(PDF) 2 Page - Analog Devices |
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AD1317KZ датащи(HTML) 2 Page - Analog Devices |
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2 / 12 page  –2– REV. A AD1317–SPECIFICATIONS (All specifications at +25 C, free air. Outputs terminated into 50 to –2 V, with + VS = +10 V, –VS = 5.2 V unless otherwise noted) AD1317KZ Parameter Symbol Min Typ Max Units Comments DC INPUT CHARACTERISTICS Offset Voltage VOS –10 10 mV CMV = 0 V Offset Drift dVOS/dT 20 µV/°C VINA/B Bias Currents –2 V to +7 V Active Ibca 10 33 µA Inhibit Ibci 50 pA VINA, VINB Bias Currents –2 V to +7 V Active Ibsa 5 16.5 µA Inhibit Ibsi 50 pA VINA/B Resistance Rinc 4 M Ω VINA, VINB Resistance Rins 8 M Ω Capacitance VINA/B, VINA, VINB CIN 1.5 2.0 pF Voltage Range VCM –2 7 Volts See Note 5 Differential Voltage VDIFF 9 Volts Common-Mode Rejection Ratio CMRR 70 80 dB –2 V to +7 V LATCH ENABLE INPUTS Input Voltage, Any Input –2.0 5.0 Volts Differential Voltage 0.4 4 Volts Logic “1” Current IIH 10 µA Logic “0” Current IIL –200 µA Capacitance 4 pF INPUT ENABLE CURRENTS Input Voltage, Any Input –2.0 5.0 Volts Differential Voltage 0.4 4 Volts Logic “1” Current IIH 20 µA Logic “0” Current IIL –200 µA Capacitance 4 pF DIGITAL OUTPUTS Logic “l” Voltage VOH –0.98 Volts Logic “0” Voltage VOL –1.50 Volts SWITCHING PERFORMANCE See Figure 3 Propagation Delays Input to Output tPDR, tPDF 1.8 2.8 ns See Note 1 Latch Enable to Output tLO 2.0 2.5 ns See Note 1 Active to Inhibit tIN 2.5 ns See Note 2 Inhibit to Active tIE 15 ns See Note 3 Propagation Delay T.C. 5 ps/ °C Dispersion See Note 4 5 V Signal See Figure 1 All Edges 450 600 ps Rising Edge 350 ps Falling Edge 350 ps 1 V Signal See Figure 2 All Edges 250 400 ps Rising Edge 200 ps Falling Edge 200 ps LATCH TIMING Input Pulse Width tPW 2.5 1.0 ns Setup Time tS 1.5 0.4 ns Hold Time tH 0ns POWER SUPPLIES –VS to +VS Range 15.2 15.6 See Note 5 Positive Supply +VS 8.0 10.0 11.0 Volts Negative Supply –VS –7.2 –5.2 –4.2 Volts Positive Supply Current I+ 50 70 mA Negative Supply Current I– –100 –70 mA PSRR 65 75 dB Measured at ±2.5% of +V S and –VS NOTES 1Propagation Delay is measured from the input threshold crossing at the 50% point of a 0 V to 5 V input to the output Q and Q crossing. 2Propagation Delay is measured from the input crossing of IE and IE to when the input bias currents drop to 10% of their nominal value. 3Propagation Delay is measured from the input crossing of IE and IE to when the input bias currents rise to 90% of their nominal value. 4Dispersion is measured with input slew rates of 0.5 V/ns and 2.5 V/ns for 5 V swings, 0.5 V/ns and 1 V/ns for 1 V swings. 5The comparator input voltage range is specified for –2 V to +7 V for typical power supply values of -5.2 V and +10.0 V but can be offset for different input ranges such as –1 V to +8 V with power supplies of –4.2 V and +11 V, as long as the required headroom of 3 V is maintained between both VH and +VS and VL and +VS. Specifications subject to change without notice. |
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