RT9503 datasheet(13/15 Pages) RICHTEK

13 / 15 page

RT9503

DS9503-03 April 2011

www.richtek.com

the input power or the EN pin. If the TIMER is shorted to

GND, the charge safety timer will be disabled.

Selecting the Input and Output Capacitors

In most applications, the most important is the high

frequency decoupling capacitor on the input of the RT9503.

A 1uF ceramic capacitor, placed in close proximity to input

pin and GND pin is recommended. In some applications

depending on the power supply characteristics and cable

length, it may be necessary to add an additional 10uF

ceramic capacitor to the input. The RT9503 requires a

small output capacitor for loop stability. A 1uF ceramic

capacitor placed between the BATT pin and GND is typically

sufficient.

Thermal Considerations

For continuous operation, do not exceed absolute

maximum operation junction temperature. The maximum

power dissipation depends on the thermal resistance of

IC package, PCB layout, the rate of surroundings airflow

and temperature difference between junction to ambient.

The maximum power dissipation can be calculated by

following formula :

PD(MAX) = ( TJ(MAX) - TA ) /

θJA

Where TJ(MAX) is the maximum operation junction

temperature 125

°C, TA is the ambient temperature and

the

θJA is the junction to ambient thermal resistance.

For recommended operating conditions specification,

where TJ(MAX) is the maximum junction temperature of the

die (125

°C) and TA is the ambient temperature. The junction

to ambient thermal resistance

θJA is layout dependent.

For WQFN-16L 3x3 packages, the thermal resistance

θJA

is 60

°C/W on the standard JEDEC 51-7 four layers thermal

test board. The maximum power dissipation at TA = 25

°C

can be calculated by following formula :

PD(MAX) = (125

°C − 25°C) / (60°C/W) = 1.667W for

WQFN-16L 3x3 packages

The maximum power dissipation depends on operating

ambient temperature for fixed TJ(MAX) and thermal

resistance

θJA. For WQFN-16L 3x3 package, the Figure

7 of derating curves allows the designer to see the effect

of rising ambient temperature on the maximum power

allowed.

Figure 7. Derating Curves for RT9503 Package

Layout Consideration

The RT9503 is a fully integrated low cost single-cell Li-

Ion battery charger ideal for portable applications. Careful

PCB layout is necessary. The following guidelines should

be strictly followed to achieve best performance of RT9503.

Input capacitor should be placed close to the IC and

connected to the ground plane. The trace of the input in

the PCB should be placed far away from the sensitive

devices or shielded by the ground.

The GND should be connected to a strong ground plane

for heat sinking and noise protection.

The connection of the RSETA should be isolated from

other noisy traces. The short wire is recommended to

prevent EMI and noise coupling.

Output capacitor should be placed close to the IC and

connected to ground plane to reduce noise coupling.

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

100

125

Ambient Temperature (°C)

WQFN-16L 3x3

Four Layers PCB

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