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RT9166B датащи(PDF) 7 Page - Richtek Technology Corporation |
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RT9166B датащи(HTML) 7 Page - Richtek Technology Corporation |
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7 / 9 page ![]() 7 DS9166B-01 April 2011 www.richtek.com RT9166B Application Information Like any linear regulator, the RT9166B requires input and output decoupling capacitors. These capacitors must be correctly selected for good performance Please note that linear regulators have high internal loop gains which require care in guarding against oscillation caused by insufficient decoupling capacitance. Input Capacitor An input capacitance of 1 μF is required between the device input pin and ground directly (the capacitance may be increased without limit). The input capacitor must be located less than 1cm from the device to assure input stability A lower ESR capacitor allows the use of less capacitance, while higher ESR type (like aluminum electrolytic) requires more capacitance. Capacitor types (aluminum, ceramic and tantalum) can be mixed in parallel, but the total equivalent input capacitance/ ESR must be defined as above for stable operation. There are no requirements for the ESR on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure 1 μF capacitance over the entire operating temperature range. Output Capacitor The RT9166B is designed specifically to work with very small ceramic output capacitors. The recommended minimum capacitance (temperature characteristics X7R or X5R) is 3.3 μF with 10mΩ to 50mΩ range ceramic capacitor between LDO output and GND for transient stability. Higher capacitance helps to improve the transient response. The output capacitor's ESR is critical because it forms a zero to provide phase lead which is required for loop stability. Input-Output (Dropout) Voltage A regulator's minimum input-to-output differential voltage (dropout voltage) determines the lowest usable supply voltage. In battery-powered systems, this determines the useful end-of-life battery voltage. Because the device uses a PMOS, its dropout voltage is a function of drain-to- source on-resistance, RDS(ON), multiplied by the load current : VDROPOUT = VIN − VOUT = RDS(ON) x IOUT Current Limit The RT9166B monitors and controls the PMOS gate voltage, with a minimum limit of the output current at 600mA. The output can be shorted to ground for an indefinite period of time without damaging the part. Short-Circuit Protection The device is short-circuit protected in the event of a peak over-current condition, such that the short-circuit control loop rapidly drives the output PMOS pass element off. Once the power pass element shuts down, the control loop will rapidly cycle the output on and off until the average power dissipation causes the thermal shutdown circuit to respond by cycling to a lower frequency. Please refer to the section on thermal information for power dissipation calculations. Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA ) / θJA Where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications of RT9166B, the maximum junction temperature is 125 °C and TA is the ambient temperature. The junction to ambient thermal resistance, θJA, is layout dependent. For SOT-89 packages, the thermal resistance, θJA, is 118°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA= 25 °C can be calculated by the following formula : |
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