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WM8310CGEB/V датащи(PDF) 42 Page - Wolfson Microelectronics plc

номер детали WM8310CGEB/V
подробное описание детали  Processor Power Management Subsystem
PDF  291 Pages
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производитель  WOLFSON [Wolfson Microelectronics plc]
домашняя страница  http://www.wolfsonmicro.com
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WM8310CGEB/V датащи(HTML) 42 Page - Wolfson Microelectronics plc

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WM8310
Pre-Production
w
PP, May 2012, Rev 3.1
42
Figure 7 Control Interface 2-wire (I2C) Register Write
The sequence of signals associated with a single register read operation is illustrated in Figure 8.
Figure 8 Control Interface 2-wire (I2C) Register Read
The Control Interface also supports other register operations, as listed above. The interface protocol
for these operations is summarised below. The terminology used in the following figures is detailed in
Table 11.
Note that, for multiple write and multiple read operations, the auto-increment option must be enabled.
This feature is enabled by default; it is described in Table 12 below.
TERMINOLOGY
DESCRIPTION
S
Start Condition
Sr
Repeated start
A
Acknowledge (SDA Low)
A
¯¯
Not Acknowledge (SDA High)
P
Stop Condition
R/W
¯¯
ReadNotWrite
0 = Write
1 = Read
[White field]
Data flow from bus master to WM8310
[Grey field]
Data flow from WM8310 to bus master
Table 11 Control Interface Terminology
Figure 9 Single Register Write to Specified Address



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