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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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WM8948ECS/R датащи(PDF) 69 Page - Wolfson Microelectronics plc |
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WM8948ECS/R датащи(HTML) 69 Page - Wolfson Microelectronics plc |
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69 / 189 page  Production Data WM8948 w PD, May 2011, Rev 4.1 69 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R2 (02h) Power management 1 2 VMID_BUF_ENA 0 VMID Buffer Enable. (The buffered VMID may be applied to disabled input and output pins.) 0 = Disabled 1 = Enabled R42 (2Ah) Output ctrl 13 SPKR_VMID_OP _ENA 0 Buffered VMID to SPKOUTR Enable 0 = Disabled 1 = Enabled 12 SPKL_VMID_OP _ENA 0 Buffered VMID to SPKOUTL Enable 0 = Disabled 1 = Enabled 11 LINER_VMID_OP _ENA 0 Buffered VMID to LINEOUTR Enable 0 = Disabled 1 = Enabled 10 LINEL_VMID_OP _ENA 0 Buffered VMID to LINEOUTL Enable 0 = Disabled 1 = Enabled 1 SPK_VROI 0 Buffered VREF to SPKOUTL / SPKOUTR resistance (Disabled outputs) 0 = approx 20k 1 = approx 1k 0 LINE_VROI 0 Buffered VREF to LINEOUTL / LINEOUTR resistance (Disabled outputs) 0 = approx 20k 1 = approx 1k Table 42 Disabled Output Control OUTPUT DISCHARGE CONTROL The line outputs and speaker outputs can be actively discharged to GND through internal resistors if desired. This is desirable at start-up in order to achieve a known output stage condition prior to enabling the soft-start VMID reference voltage. This is also desirable in shut-down to prevent the external connections from being affected by the internal circuits. The individual control bits for discharging each audio output are described in Table 43. |
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