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WM8946ECS/R датащи(PDF) 87 Page - Wolfson Microelectronics plc

номер детали WM8946ECS/R
подробное описание детали  Stereo Low-Power CODEC with Video Buffer
PDF  175 Pages
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производитель  WOLFSON [Wolfson Microelectronics plc]
домашняя страница  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8946ECS/R датащи(HTML) 87 Page - Wolfson Microelectronics plc

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Production Data
WM8946
w
PD, July 2012, Rev 4.3
87
The video buffer control registers are described in Table 57.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R38 (26h)
Video Buffer
7
VB_ENA
0
Video buffer enable
0 = Disabled
1 = Enabled
6
VB_QBOOST
0
Video buffer filter Q-Boost control
0 = Disabled
1 = Enabled
5
VB_GAIN
0
Video buffer gain
0 = 0dB (=6dB unloaded)
1 = 6dB (=12dB unloaded)
4:3
VB_DISOFF
111
Video buffer DC offset control
000 = Reserved
001 = 40mV offset
010 = Reserved
011 = 20mV offset
100 = Reserved
101 = Reserved
110 = Reserved
111 = 0mV offset
Note – the specified offset applies
to the 0dB gain setting
(VB_GAIN=0). When 6dB gain is
selected, the DC offset is doubled.
1
VB_PD
0
Video buffer pull-down
0 = pull-down disabled
1 = pull-down enabled
0
VB_CLAMP
0
Enable the clamp between the
video input and ground
0 = no clamp
1 = Video buffer input is clamped to
ground
Table 57 Video Buffer Control
The video buffer circuit is illustrated in Figure 34.
Figure 34 Video Buffer Block Diagram
The video buffer requires two external resistor components, as illustrated in Figure 34. For best
performance, the resistor RSOURCE should be matched (equal) to the load impedance RLOAD.



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