WM8726

Production Data

w

PD, Rev 4.8, January 2012

13

LEFT CHANNEL

RIGHT CHANNEL

LRCIN

BCKIN

DIN

1/fs

n

3

2

1

n-2 n-1

LSB

MSB

n

3

2

1

n-2 n-1

LSB

MSB

1 BCKIN

1 BCKIN

Figure 6 I

RIGHT JUSTIFIED MODE

The WM8726 supports word lengths of 16-bits in right justified mode.

In right justified mode, the digital audio interface receives data on the DIN input. Audio Data is time

multiplexed with LRCIN indicating whether the left or right channel is present. LRCIN is also used

as a timing reference to indicate the beginning or end of the data words.

In right justified mode, the minimum number of BCKINs per LRCIN period is 2 times the selected

word length. LRCIN must be high for a minimum of word length BCKINs and low for a minimum of

word length BCKINs. Any mark to space ratio on LRCIN is acceptable provided the above

requirements are met.

In right justified mode, the LSB is sampled on the rising edge of BCKIN preceding a LRCIN

transition. LRCIN is high during the left samples and low during the right samples.

LEFT CHANNEL

RIGHT CHANNEL

LRCIN

BCKIN

DIN

1/fs

16

3

2

1

14

15

LSB

MSB

16

3

2

1

14

15

LSB

MSB

Figure 7 Right Justified Mode Timing Diagram

DSP MODE

A DSP compatible, time division multiplexed format is also supported by the WM8726. This format

is of the type where a ‘synch’ pulse is followed by two data words (left and right) of predetermined

word length. (16-bits). The ‘synch’ pulse replaces the normal duration LRCIN, and DSP mode is

auto-detected by the shorter than normal duration of the LRCIN. If LRCIN is of 4 BCKIN or less

duration, the DSP compatible format is selected. Mode A and Mode B clock formats are

supported, selected by the state of the FORMAT pin.