HT68F016 datasheet(9/116 Pages) HOLTEK

9 / 116 page

Pin Assignment

Note:

1. Bracketed pin names indicate non-default pinout remapping locations.

2. If the pin-shared pin functions have multiple outputs simultaneously, its pin names at the right side of the

²/² sign can be used for higher priority.

3. VDD&AVDD means the VDD and AVDD are the double bonding.

HT66F016/HT66F017/HT68F016/HT68F017

Rev. 1.00

May 14, 2012

H T 6 6 F 0 1 7

1 6 D I P - A / N S O P - A / S S O P - A

P B 2

P B 1 / [ T C K 0 ] / [ T P 1 ]

P B 0 / [ T P 0 ]

P A 3 / I N T 0 / T C K 1 / T P 0 / A N 3

P A 2 / [ I N T 0 ] / [ T C K 1 ] / [ T P 0 ] / C X / A N 2

P A 1 / C - / A N 1 / V R E F

P A 0 / C + / A N 0

V S S / A V S S

P B 3

P B 4

P B 5

P A 4 / [ I N T 1 ] / T C K 0 / T P 1

P A 5 / I N T 1 / [ T P 0 ] / O S C 2

P A 6 / [ T C K 0 ] / [ T P 1 ] / O S C 1

P A 7 / [ T C K 0 ] / [ T P 1 ]

V D D / A V D D

1 6

1 5

1 4

1 3

1 2

1 1

1 0

H T 6 6 F 0 1 6

1 6 D I P - A / N S O P - A / S S O P - A

P B 2

P B 1 / [ T P 1 ]

P B 0

P A 3 / I N T 0 / T C K 1 / A N 3

P A 2 / [ I N T 0 ] / [ T C K 1 ] / C X / A N 2

P A 1 / C - / A N 1 / V R E F

P A 0 / C + / A N 0

V S S / A V S S

P B 3

P B 4

P B 5

P A 4 / [ I N T 1 ] / T P 1

P A 5 / I N T 1 / O S C 2

P A 6 / [ T P 1 ] / O S C 1

P A 7 / [ T P 1 ]

V D D / A V D D

1 6

1 5

1 4

1 3

1 2

1 1

1 0

H T 6 8 F 0 1 6

1 6 D I P - A / N S O P - A / S S O P - A

P B 2

P B 1 / [ T P 1 ]

P B 0

P A 3 / I N T 0 / T C K 1

P A 2 / [ I N T 0 ] / [ T C K 1 ] / C X

P A 1 / C -

P A 0 / C +

V S S / A V S S

P B 3

P B 4

P B 5

P A 4 / [ I N T 1 ] / T P 1

P A 5 / I N T 1 / O S C 2

P A 6 / [ T P 1 ] / O S C 1

P A 7 / [ T P 1 ]

V D D / A V D D

1 6

1 5

1 4

1 3

1 2

1 1

1 0

H T 6 8 F 0 1 7

1 6 D I P - A / N S O P - A / S S O P - A

P B 3

P B 4

P B 5

P A 4 / [ I N T 1 ] / T C K 0 / T P 1

P A 5 / I N T 1 / [ T P 0 ] / O S C 2

P A 6 / [ T C K 0 ] / [ T P 1 ] / O S C 1

P A 7 / [ T C K 0 ] / [ T P 1 ]

V D D / A V D D

1 6

1 5

1 4

1 3

1 2

1 1

1 0

P B 2

P B 1 / [ T C K 0 ] / [ T P 1 ]

P B 0 / [ T P 0 ]

P A 3 / I N T 0 / T C K 1 / T P 0

P A 2 / [ I N T 0 ] / [ T C K 1 ] / [ T P 0 ] / C X

P A 1 / C -

P A 0 / C +

V S S / A V S S

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