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CXP81124 датащи(PDF) 21 Page - Sony Corporation |
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CXP81124 датащи(HTML) 21 Page - Sony Corporation |
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21 / 27 page ![]() – 21 – CXP81120/81124 SO1 cycle time SI1 data setup time SI1 data hold time tLCY tLSU tLHD SO1 SI1 SI1 SI1 ∗1 2 2 104 µs µs µs Item Symbol Pin Condition Min. Typ. Max. Unit Serial transfer (CH1) (Special mode) (Ta = –20 to +75°C, VDD = 4.5 to 5.5V, Vss = 0V reference) ∗1 t LCY is specified only when serial mode register (CH1) (SIOM1: 01FAH) lower 2 bits (SO1 clock selection) is set at 104µs according to the system clock frequency. Note) The load of SO1 pin is 50pF + 1TTL. SO1 cycle time SI1 data setup time SI1 data hold time tLCY tLSU tLHD SO1 SI1 SI1 SI1 ∗1 2 2 104 µs µs µs Item Symbol Pin Condition Min. Typ. Max. Unit Serial transfer (CH1) (Special mode) (Ta = –20 to +75°C, VDD = 3.0 to 3.6V, Vss = 0V reference) ∗1 t LCY is specified only when serial mode register (CH1) (SIOM1: 01FAH) lower 2 bits (SO1 clock selection) is set at 104µs according to the system clock frequency. Note) The load of SO1 pin is 50pF. Fig. 6. Serial transfer CH1 timing (Special mode) SO1 SI1 tLCY Start bit Output data bit tLCY 0.5VDD 0.8VDD 0.2VDD tLCY/2 tLSU tLHD Input data bit |
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