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SPEAR1340 датащи(PDF) 105 Page - STMicroelectronics |
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SPEAR1340 датащи(HTML) 105 Page - STMicroelectronics |
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105 / 200 page ![]() SPEAr1340 Pin description Doc ID 023063 Rev 4 105/200 3.5.3 Clocks and resets 3.5.4 Debug interface Note: 1 The ARM Trace ports are enabled via the miscellaneous registers. 2 For ARM JTAG mode, the TEST[4:0] pins should be set to “00001” at power-up. For functional mode, the same pins should be set to “00000”. 3 When the 2V5 power supply is not present on the OTP supply ball, the JTAG debug features are not available on the device. Table 13. Main clock and reset pins descriptions Signal name Description Type Ball MCLK_XI Master clock (MCLK) 24 MHz (typical) crystal in OSC A7 MCLK_XO Master clock (MCLK) 24 MHz (typical) crystal out A8 RTC_XI Real-time clock (RTC) 32 kHz crystal in OSC B1 RTC_XO Real-time clock (RTC) 32 kHz crystal out A1 MRESETn Main reset IOTYP E1 AF15 Table 14. Debug pins description Signal name Description Type Ball ARM_TRSTn Test reset input I AE15 ARM_TCK Test trace clock I AD16 ARM_TDI Test trace data input I AD15 ARM_TMS Test trace mode select I AE16 ARM_TDO Test trace data output IO AF16 |
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