S29AS008J datasheet(33/55 Pages) SPANSION

33 / 55 page

November 9, 2011 S29AS008J_00_09

S29AS008J

Data

She e t

11. Command Definitions

Table 11.1 S29AS008J Command Definitions (Word Mode)

Command

Sequence

(Note 1)

Bus Cycles (Notes 2–5)

First

Second

Third

Fourth

Fifth

Sixth

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Read (Note 6)

1RA

Reset (Note 7)

XXX

Manufacturer ID

555

2AA

555

X00

Device ID,

Top Boot Block

555

2AA

555

X01

227E

X0E

2204

X0F

2204

Device ID,

Bottom Boot Block

555

2AA

555

X01

227E

X0E

2204

X0F

2203

Secured Silicon Sector Factory

Protect, Top Boot (Note 9)

555

2AA

555

X03

0089/0009

Secured Silicon Sector Factory

Protect, Bottom Boot (Note 9)

555

2AA

555

X03

0091/0011

Sector Group Protect Verify

(Note 10)

555

2AA

555

(SA)X02

XX00/XX01

Enter Secured Silicon Sector

555

2AA

555

Exit Secured Silicon Sector

555

2AA

555

XXX

CFI Query (Note 11)

155

Program

555

2AA

555

Unlock Bypass

555

2AA

555

Unlock Bypass Program (Note 12)

XXX

Unlock Bypass Reset (Note 13)

XXX

Chip Erase

555

2AA

555

2AA

555

Sector Erase

555

2AA

555

2AA

Erase Suspend (Note 14)

XXX

Erase Resume (Note 15)

XXX

Legend

X = Don’t care

RA = Address of the memory location to be read.

RD = Data read from location RA during read operation.

PA = Address of the memory location to be programmed. Addresses latch on the

falling edge of the WE# or CE# pulse, whichever happens later.

PD = Data to be programmed at location PA. Data latches on the rising edge of

WE# or CE# pulse, whichever happens first.

SA = Address of the sector to be verified (in autoselect mode) or erased. Address

bits A18–A12 uniquely select any sector.

Notes

1. See Table 7.1 on page 14 for description of bus operations.

2. All values are in hexadecimal.

3. Except for the read cycle and the fourth cycle of the autoselect command

sequence, all bus cycles are write cycles.

4. Data bits DQ15–DQ8 are don’t cares for unlock and command cycles.

5. Address bits A18–A11 are don’t cares for unlock and command cycles,

unless SA or PA required.

6. No unlock or command cycles required when reading array data.

7. The Reset command is required to return to reading array data when device

is in the autoselect mode, or if DQ5 goes high (while the device is providing

status data).

8. The fourth cycle of the autoselect command sequence is a read cycle.

9. For top boot, 89h = factory locked, 09h = not factory locked. For bottom boot,

91h = factory locked, 11h = not factory locked.

10. The data is 00h for an unprotected sector and 01h for a protected sector. See

Autoselect Command Sequence on page 28 for more information.

11. Command is valid when device is ready to read array data or when device is

in autoselect mode.

12. The Unlock Bypass command is required prior to the Unlock Bypass Program

command.

13. The Unlock Bypass Reset command is required to return to reading array

data when the device is in the unlock bypass mode. F0 is also acceptable.

14. The system may read and program in non-erasing sectors, or enter the

autoselect mode, when in the Erase Suspend mode. The Erase Suspend

command is valid only during a sector erase operation.

15. The Erase Resume command is valid only during the Erase Suspend mode.

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