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ST10F280 датащи(PDF) 107 Page - STMicroelectronics

номер детали ST10F280
подробное описание детали  16-bit MCU with MAC unit, 512 Kbyte Flash memory and 18 Kbyte RAM
PDF  239 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST10F280 датащи(HTML) 107 Page - STMicroelectronics

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ST10F280
Parallel ports
Doc ID 8673 Rev. 3
107/239
DP2
Address:
0xFFC2h / E1h SFR
Reset:
0x0000h
Type:
R/W
ODP2
Address:
0xF1C2h / E1h ESFR
Reset:
0x0000h
Type:
R/W
12.4.1
Alternate functions of Port 2
All Port 2 lines (P2.15...P2.0) serve as capture inputs or compare outputs (CC15IO...CC0IO)
for the CAPCOM1 unit.
When a Port 2 line is used as a capture input, the state of the input latch, which represents
the state of the port pin, is directed to the CAPCOM unit via the line “Alternate Pin Data
Input”. If an external capture trigger signal is used, the direction of the respective pin must
be set to input. If the direction is set to output, the state of the port output latch will be read
since the pin represents the state of the output latch. This can be used to trigger a capture
event through software by setting or clearing the port latch. Note that in the output
configuration, no external device may drive the pin, otherwise conflicts would occur.
When a Port 2 line is used as a compare output (compare modes 1 and 3), the compare
event (or the timer overflow in compare mode 3) directly effects the port output latch. In
compare mode 1, when a valid compare match occurs, the state of the port output latch is
read by the CAPCOM control hardware via the line “Alternate Latch Data Input”, inverted,
and written back to the latch via the line “Alternate Data Output”.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DP2.y Port direction register DP2 bit y
DP2.y = 0: Port line P2.y is an input (high-impedance)
DP2.y = 1: Port line P2.y is an output
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
ODP2.y Port 2 Open Drain control register bit y
ODP2.y = 0: Port line P2.y output driver in push/pull mode
ODP2.y = 1: Port line P2.y output driver in open drain mode



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