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AUGUST 08, 2012 |DATA SHEET | Rev 3.3

IR3897

4A Highly Integrated SupIRBuck

Single‐Input Voltage, Synchronous Buck Regulator

PD‐97663

The ESR zero of the output capacitor is expressed as

follows:

(18)

ESR

π*ESR* C





VOUT

VREF

PO LE

E/A

Z f

Frequency

Gain(dB )

H(s) dB

Com p

Z IN

Figure 26: Type II compensation network

and its asymptotic gain plot

The transfer function (Ve/Vout) is given by:

( )

(19)

out

VsR C

sR C





 



The (s) indicates that the transfer function varies as a

function of frequency. This configuration introduces a

gain and zero, expressed by:



(20)

(21)











First select the desired zero‐crossover frequency (Fo):



(22)

and F

1/5~1/10 *

oESR

F 



Use the following equation to calculate R3:

(23)

osc

ESR

VF F





Where:

Vin = Maximum Input Voltage

Vosc = Amplitude of the oscillator Ramp Voltage

Fo = Crossover Frequency

FESR = Zero Frequency of the Output Capacitor

FLC = Resonant Frequency of the Output Filter

R5 = Feedback Resistor

To cancel one of the LC filter poles, place the zero before the

LC filter resonant frequency pole:

75 % *

0.75*

(24)

zLC







Use equations (20), (21) and (22) to calculate C3.

One more capacitor is sometimes added in parallel with C3

and R3. This introduces one more pole which is mainly used

to suppress the switching noise.

The additional pole is given by:

(25)

POLE









The pole sets to one half of the switching frequency which

results in the capacitor CPOLE:

(26)

POLE

*R *F











For a general solution for unconditional stability for any type

of output capacitors, and a wide range of ESR values, a type III

compensation network can be used, as shown in Fig. 27.

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