CYUSB3012-BZXC datasheet(21/40 Pages) CYPRESS

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CYUSB301X

Document Number: 001-52136 Rev. *L

Page 21 of 40

AC Timing Parameters

GPIF II Timing

Figure 8. GPIF II Timing in Synchronous Mode

CT L (O U T)

CT L( IN)

tD H

tD S

tC LK

CLK

tC T LO

tC O E

Data(IN)

Data 1

(O U T)

tH Z

tLZ

tD O H

tC O H

tC LK H tC LK L

tLZ

Data 2

(O U T)

tC O

tD O H

D Q [31:0]

Note

4. All parameters guaranteed by design and validated through characterization.

Table 10. GPIF II Timing Parameters in Synchronous Mode[4]

Parameter

Description

Min

Max

Units

Frequency

Interface clock frequency

–

100

MHz

tCLK

Interface clock period

–

tCLKH

Clock high time

–

tCLKL

Clock low time

–

CTL input to clock setup time

(Sync speed = 1)

2–

CTL input to clock hold time

(Sync speed = 1)

0.5

–

tDS

Data in to clock setup time

(Sync speed = 1)

2–

tDH

Data in to clock hold time

(Sync speed = 1)

0.5

–

tCO

Clock to data out propagation delay when DQ bus is already in

output direction (Sync speed = 1)

–8

tCOE

Clock to data out propagation delay when DQ lines change to

output from tristate and valid data is available on the DQ bus

(Sync speed = 1)

-9

tCTLO

Clock to CTL out propagation delay (Sync speed = 1)

–

tDOH

Clock to data out hold

–

tCOH

Clock to CTL out hold

–

tHZ

Clock to high-Z

–

tLZ

Clock to low-Z (Sync speed = 1)

–

tS_ss0

CTL input/data input to clock setup time (Sync speed = 0)

–

tH_ss0

CTL input/data input to clock hold time (Sync speed = 0)

2.5

–

tCO_ss0

Clock to data out / CTL out

propagation delay (sync speed = 0)

–15

tLZ_ss0

Clock to low-Z (sync speed = 0)

–

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