CYUSB301X

Document Number: 001-52136 Rev. *L

Page 28 of 40

Figure 14. Asynchronous Slave FIFO Write Mode

Asynchronous Write Cycle Timing

FIFO ADDR

SLCS

SLWR

DATA In

High-Z

S

S

PKTEND

SLOE

(HIGH)

An

Am

FLAGA

dedicated thread Flag for An

(1=Not Full 0 = Full)

FLAGB

dedicated thread Flag for Am

(1=Not Full 0 = Full)

tWRPE: SLWR# de-assert to PKTEND deassert = 2ns min (This means that PKTEND should not be be deasserted before SLWR#)

Note: PKTEND must be asserted at the same time as SLWR#.

Asynchronous ZLP Write Cycle Timing

FIFO ADDR

SLCS

SLWR

(HIGH)

DATA In

High-Z

SLOE

(HIGH)

An

FLAGA

dedicated thread Flag for An

(1=Not Full 0 = Full)

FLAGB

dedicated thread Flag for Am

(1=Not Full 0 = Full)

PKTEND