CXA2000Q datasheet(5/48 Pages) SONY

номер детали	CXA2000Q

подробное описание детали	Y/C/RGB/D for PAL/NTSC Color TVs

PDF	48 Pages

Scroll/Zoom	100%

производитель	SONY [Sony Corporation]

домашняя страница	http://www.sony.co.jp

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CXA2000Q

YSSW control input.

When YS is high, the RGB1 block signal

is selected; when YS is low, the Y/C block

is selected. This function can be disabled

by the YS1OFF setting for the I2C bus.

VILMAX = 0.4V

VIHMIN = 1.0V

SCPOUT

Sand castle pulse output. The 0 to 5V

BGP pulse, the phase of which is

controlled through the bus, is

superimposed with the 0 to 2V H and

VBLK pulse for output.

YS1

R1IN

G1IN

B1IN

Analog R, G and B signal inputs.

Input a 0.7Vp-p (no sync, 100 IRE) signal

via a capacitor.

The signal is clamped to 5.7V at the burst

timing of the signal input to the HSIN

input pin (Pin 47).

YS2

YS/YMSW YS control input.

When YS is high, the RGB2 block signal

is selected; when YS is low, the YSSW

output signal is selected.

VILMAX = 0.4V

VIHMIN = 1.0V

10k

100µA

40k

30k

200

100µA

40k

YS/YMSW YM control input.

When YM is high, the YSSW output

signal is attenuated by 9.6dB.

VILMAX = 0.4V

VIHMIN = 1.0V

100µA

40k

No.

Symbol

Equivalent circuit

Description

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