SC5014 datasheet(16/34 Pages) SEMTECH

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SC5014

Applications Information (continued)

(2) PWM Indirect Control

This is the default mode for LED PWM dimming in the

SC504. In this mode, the input signal applied on the PWM

pin is passed through a duty cycle extractor block after the

system has detected two successive duty cycles that are the

same. The extractor measures the duty cycle of the PWM

input, and, depending on the value of FAST_FREQ, the duty

cycle is converted to a 9-bit value (FAST_FREQ = ) or a 0-

bit value (FAST_FREQ = 0). This value is then passed to the

PWM generator block as shown in Figure .

The LED PWM output frequency is set via the FREQ regis-

ter (address 0x05) and the FAST_FREQ bit.

With FAST_FREQ = 0, low dimming frequency option is

selected and the PWM dimming frequency will be accord-

ing to the following equation:

10kHz(max)

]

[

FREQ

[

1024

MHz

Frequency

Dimming

PWM

With FAST_FREQ = , the high dimming frequency option

is selected and the PWM dimming frequency is shown by

the following equation:

20kHz(max)

]

[

FREQ

[

512

MHz

Frequency

Dimming

PWM

The default option is FAST_FREQ = . This gives 9-bit duty

cycle resolution and up to 20kHz dimming frequency

range. The PWM input is usually generated by the system

graphics processor. This mode allows the user to set the

PWM output dimming frequency independent of the

PWMI input.

If the PWM signal has jitter, the SC504 provides an option

to filter it out. Hysteresis is also provided by selecting the

WND[:0] bits in the DCR register (address 0x0). WND[:0]

bits set the window comparator such that if a change in

the duty cycle is detected which is smaller than the set

window, then it is ignored.

(3) I2C Control

In I2C dimming mode (refer to Figure , page 4), both the

output LED dimming duty cycle and the dimming fre-

quency are set via the internal registers. The PWMI pin

should be connected to ground. In this mode, the LED

dimming duty cycle is set via the duty cycle registers

(addresses 0x03, 0x04); and the dimming frequency is set

via the FREQ register (address 0x05) and the FAST_FREQ

bit.

With FAST_FREQ = 0, the LED duty cycle can achieve 0-bit

resolution, D[9:0], which is combined by two portions: ()

MSB portion - register address 0x03 [:0] and (2) LSB portion

- register address 0x04 [7:0] as shown below.

The dimming duty cycle with FAST_FREQ = 0 can be calcu-

lated as:

LED Dimming Duty Cycle = {D[9:0]

decimal }/2

With FAST_FREQ = , the LED duty cycle can achieve 9-bit

resolution, D[9:], which is combined by two portions: ()

MSB portion - register address 0x03 [:0] and (2) LSB portion

- register address 0x04 [7:] as shown below.

The dimming duty cycle with FAST_FREQ = can be calcu-

lated as:

LED Dimming Duty Cycle = {D[9:]

decimal }/2

In both cases mentioned above, the duty cycle is fixed to be

0 when D[9:0] is set as 0x00.

The PWM dimming frequency is controlled the same way as

in“Indirect Control”.

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