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TNETA1585PGF датащи(PDF) 22 Page - Texas Instruments

номер детали TNETA1585PGF
подробное описание детали  ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
PDF  32 Pages
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TNETA1585PGF датащи(HTML) 22 Page - Texas Instruments

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TNETA1585
ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE
WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
SDNS041A – NOVEMBER 1996 – REVISED JULY 1998
22
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
operating characteristics over recommended operating conditions (see Figure 5)
parameter-memory interface (write operation)
data bus enable and disable times
NO.
PARAMETER
MIN
MAX
UNIT
1
ten(CH-PE)
Enable time, from CLOCK
↑ to PMDATA31–PMDATA0 enabled
8
20
ns
1
tdis(CH-PZ)
Disable time, from CLOCK
↑ to PMDATA31–PMDATA0 disabled (Z state)
3
9
ns
PMAD15–
PMAD0
(output)
PMOE
(output)
PMWE
(output)
PMDATA31–
PMDATA0
(output)
1
Valid
Z
CLOCK
(input)
2
Z
Figure 5. Parameter-Memory Interface (Write Operation) – Data Bus Enable and Disable Times



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