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+

S0095-01

GENERAL POWER DESIGN CONSIDERATIONS

I

DC(EQ) +

I

Cont

(duty cycle)

(1)

TLV4110-EP, TLV4111-EP

TLV4112-EP, TLV4113-EP

Figure 29.

When driving heavy loads at high junction temperatures there is an increased probability of electromigration

affecting the long-term reliability of ICs. Therefore, to avoid this issue:

• The output current must be limited (at these high-junction temperatures).

OR

• The junction temperature must be limited.

The maximum continuous output current at a die temperature 150

°C will be 1/3 of the current at 105°C.

The junction temperature will be dependent on the ambient temperature around the IC, thermal impedance from

the die to the ambient and power dissipated within the IC.

Where:

the output of the IC.

θ

Reducing one or more of these factors results in a reduced die temperature. The 8-pin SOIC (small outline

integrated circuit) has a thermal impedance from junction to ambient of 176

°C/W. For this reason it is

recommended that the maximum power dissipation of the 8-pin SOIC package be limited to 350 mW, with peak

dissipation of 700 mW as long as the RMS value is less than 350 mW.

The use of the MSOP PowerPAD™ dramatically reduces the thermal impedance from junction to case. And, with

correct mounting, the reduced thermal impedance greatly increases the IC's permissible power dissipation and

output current handling capability. For example, the power dissipation of the PowerPAD™ is increased to above

1 W. Sinusoidal and pulse-width modulated output signals also increase the output current capability. The

equivalent dc current is proportional to the square-root of the duty cycle:

CURRENT DUTY CYCLE

EQUIVALENT DC CURRENT

AT PEAK RATED CURRENT

AS A PERCENTAGE OF PEAK

100

100

70

84

50

71

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