OPA211-HT datasheet(21/26 Pages) TI1

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OPA211-HT

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SBOS481B – JULY 2009 – REVISED APRIL 2012

Figure 47 depicts a specific example where the input

DFN PACKAGE

voltage, VIN, exceeds the positive supply voltage

The OPA211 is offered in an DFN-8 package (also

(+VS) by 500 mV or more. Much of what happens in

known as SON). The DFN package is a QFN

the circuit depends on the supply characteristics. If VS

package with lead contacts on only two sides of the

can sink the current, one of the upper input steering

bottom of the package. This leadless package

diodes

conducts

and

directs

current

VS.

maximizes board space and enhances thermal and

Excessively

high

current

levels

can

flow

with

electrical characteristics through an exposed pad.

increasingly higher VIN. As a result, the datasheet

specifications recommend that applications limit the

DFN packages are physically small, and have a

input current to 10 mA.

smaller routing area, improved thermal performance,

and improved electrical parasitics. Additionally, the

If the supply is not capable of sinking the current, VIN

absence

external

leads

eliminates

bent-lead

may

begin

sourcing

current

the

operational

issues.

amplifier, and then take over as the source of positive

supply voltage. The danger in this case is that the

The DFN package can be easily mounted using

voltage can rise to levels that exceed the operational

standard

printed

circuit

board

(PCB)

assembly

amplifier absolute maximum ratings. In extreme but

techniques. See Application Note QFN/SON PCB

rare cases, the absorption device triggers on while VS

Attachment (SLUA271) and Application Report Quad

and –VS are applied. If this event happens, a direct

Flatpack No-Lead Logic Packages (SCBA017), both

current path is established between the VS and –VS

available for download at www.ti.com.

supplies. The power dissipation of the absorption

The exposed leadframe die pad on the bottom of

device is quickly exceeded, and the extreme internal

the package must be connected to V–. Soldering

heating destroys the operational amplifier.

the thermal pad improves heat dissipation and

Another common question involves what happens to

enables specified device performance.

the amplifier if an input signal is applied to the input

while the power supplies VS and/or –VS are at 0 V.

DFN LAYOUT GUIDELINES

Again, it depends on the supply characteristic while at

The exposed leadframe die pad on the DFN package

0 V, or at a level below the input signal amplitude. If

should be soldered to a thermal pad on the PCB. A

the supplies appear as high impedance, then the

mechanical drawing showing an example layout is

operational amplifier supply current may be supplied

attached at the end of this data sheet. Refinements to

by the input source via the current steering diodes.

this layout may be necessary based on assembly

This state is not a normal bias condition; the amplifier

process requirements. Mechanical drawings located

most likely will not operate normally. If the supplies

at the end of this data sheet list the physical

are low impedance, then the current through the

dimensions for the package and pad. The five holes

steering diodes can become quite high. The current

in the landing pattern are optional, and are intended

level depends on the ability of the input source to

for use with thermal vias that connect the leadframe

deliver current, and any resistance in the input path.

die pad to the heatsink area on the PCB.

Soldering the exposed pad significantly improves

board-level reliability during temperature cycling, key

push, package shear, and similar board-level tests.

Even

with

applications

that

have

low-power

dissipation, the exposed pad must be soldered to the

PCB to provide structural integrity and long-term

reliability.

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