TIBPLS506AC

13

× 97 × 8 FIELD-PROGRAMMABLE LOGIC SEQUENCER

SRPS003C – D3090, DECEMBER 1987 – REVISED NOVEMBER 1995

POST OFFICE BOX 655303

4

S-R FUNCTION TABLE (see Note 1)

CLK POLARITY FUSE

CLK

S

R

STATE REGISTER

INTACT

↑

L

L

Q0

INTACT

↑

LH

L

INTACT

↑

HL

H

INTACT

↑

H

H

INDETERMINATE

BLOWN

↓

LL

Q0

BLOWN

↓

LH

L

BLOWN

↓

HL

H

BLOWN

↓

H

H

INDETERMINATE

NOTE 1: Q0 is the state of the S-R registers before the active clock edge.

functional block diagram (positive logic)

denotes fused inputs

I0 – I11

8

&

60 x 97

≥1

97 x 50

97

CLK

I12/OE

2

2 x

16

16

Q0 – Q7

2

16

16

16 x

16

13

13

13 x

1

C1

1S

1R

16 x

C1

1S

1R

8 x

8

8

1

EN

8 x MUX

12

G1

1

16

2

16

8

8