SN75LBC976

9CHANNEL DIFFERENTIAL TRANSCEIVER

SLLS133D − AUGUST 1992 − REVISED MAY 1995

2−8

POST OFFICE BOX 655303

POST OFFICE BOX 1443

PARAMETER MEASUREMENT INFORMATION

td(ODH)

GND

RL = 75 Ω

50 pF†

50 pF†

Output

B+

B−

A

Input

(see Note A)

CDE0 at 5 V,

DE/RE at 5 V,

BSR at 0 V,

Others Open

5 V

Input

Output

td(ODL)

3 V

1.5 V

0 V

90%

90%

0 V

10%

10%

tr

tf

TEST CIRCUIT

VOLTAGE WAVEFORMS

R1 = 165

Ω

R2 = 165

Ω

† Includes probe and jig capacitance.

NOTE A: The input is provided by a pulse generator with an output of 0 to 3 V, PRR of 1 MHz, 50% duty cycle,

tr and tf < 6 ns, and ZO = 50 Ω.

Figure 4. Driver Test Circuit and Voltage Waveforms