54ACT16821, 74ACT16821

20BIT BUSINTERFACE FLIPFLOPS

WITH 3STATE OUTPUTS

SCAS176A − JANUARY 1991 − REVISED APRIL 1996

1

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Widebus

 Family

Wider Address/Data Paths or Buses With

Parity

PCB Layout

Minimizes High-Speed Switching Noise

CMOS) 1-

µm Process

Small-Outline (DL) Packages Using 25-mil

Center-to-Center Pin Spacings and 380-mil

Fine-Pitch Ceramic Flat (WD) Packages

Using 25-mil Center-to-Center Pin Spacings

description

These 20-bit flip-flops feature 3-state outputs

designed specifically for driving highly-capacitive

or relatively low-impedance loads. They are

particularly suitable for implementing wider buffer

registers, I/O ports, parity bus interfacing, and

working registers.

The ’ACT16821 can be used as two 10-bit

flip-flops or one 20-bit flip-flop. On the positive

transition of the clock (CLK) input, the Q outputs

follow the data (D) inputs. Each 10-bit flip-flop

section has a buffered output-enable (1OE or

2OE) input that can be used to place the ten

outputs in either a normal logic state (high or low

logic levels) or the high-impedance state. In the

high-impedance state, the outputs neither load

nor drive the bus lines significantly.

OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

The 74ACT16821 is packaged in theTI shrink small-outline package, which provides twice the I/O pin count and

functionality of standard small-outline packages in the same printed-circuit-board area.

The 54ACT16821 is characterized for operation over the full military temperature range of −55

°C to 125°C. The

74ACT16821 is characterized for operation from −40

°C to 85°C.

Copyright

 1996, Texas Instruments Incorporated

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

54ACT16821 . . . WD PACKAGE

74ACT16821 . . . DL PACKAGE

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1OE

1Q1

1Q2

GND

1Q3

1Q4

1Q5

1Q6

1Q7

GND

1Q8

1Q9

1Q10

2Q1

2Q2

2Q3

GND

2Q4

2Q5

2Q6

2Q7

2Q8

GND

2Q9

2Q10

2OE

1CLK

1D1

1D2

GND

1D3

1D4

1D5

1D6

1D7

GND

1D8

1D9

1D10

2D1

2D2

2D3

GND

2D4

2D5

2D6

2D7

2D8

GND

2D9

2D10

2CLK