54ACT11640, 74ACT11640

OCTAL BUS TRANSCEIVERS

WITH 3STATE OUTPUTS

SCAS027A − D2957, JULY 1987 − REVISED APRIL 1993

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Copyright

2−1

High-Density 24-Pin Packages

PCB Layout

Minimize High-Speed Switching Noise

CMOS) 1-

mm Process

at 125

°C

Outline Packages, Ceramic Chip Carriers,

and Standard Plastic and Ceramic 300-mil

DIPs

description

These octal bus transceivers are designed for

asynchronous two-way communication between

data buses. These devices transmit data from the

A bus to the B bus or from the B bus to the A bus

depending upon the level at the direction control

(DIR) input. The enable input G is used to disable

the device so the buses are effectively isolated.

The 54ACT11640 is characterized for operation

over the full military temperature range of − 55

°C

to 125

°C. The 74ACT11640 is characterized for

operation from − 40

°C to 85°C.

FUNCTION TABLE

CONTROL

INPUTS

OPERATION

G

DIR

OPERATION

L

L

H

L

H

X

B data to A bus

A data to B bus

Isolation

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

A1

A2

A3

A4

GND

GND

GND

GND

A5

A6

A7

A8

DIR

B1

B2

B3

B4

B5

B6

B7

B8

G

54ACT11640 . . . JT PACKAGE

74ACT11640 . . . DW OR NT PACKAGE

(TOP VIEW)

32 1

13 14

5

6

7

8

9

10

11

B7

B8

G

NC

A8

A7

A6

B2

B1

DIR

NC

A1

A2

A3

4

15 16 17 18

54ACT11640 . . . FK PACKAGE

(TOP VIEW)

28 27 26

25

24

23

22

21

20

19

12

NC − No internal connection

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

EPIC is a trademark of Texas Instruments Incorporated.