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SL4052BN датащи(PDF) 5 Page - System Logic Semiconductor

номер детали SL4052BN
подробное описание детали  Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS
PDF  6 Pages
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производитель  SLS [System Logic Semiconductor]
домашняя страница  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor

SL4052BN датащи(HTML) 5 Page - System Logic Semiconductor

  SL4052BN Datasheet HTML 1Page - System Logic Semiconductor SL4052BN Datasheet HTML 2Page - System Logic Semiconductor SL4052BN Datasheet HTML 3Page - System Logic Semiconductor SL4052BN Datasheet HTML 4Page - System Logic Semiconductor SL4052BN Datasheet HTML 5Page - System Logic Semiconductor SL4052BN Datasheet HTML 6Page - System Logic Semiconductor  
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SL4052B
System Logic
Semiconductor
SLS
ADDITIONAL APPLICATION CHARACTERISTICS
VCC
VIS
Limit
*
Symbol
Parameter
Test Conditions
V
V
25
°C Unit
BW
Maximum On-
Channel
Bandwidth or
Minimum
Frequency
Response (-3db)
VEE=GND
RL=1k
Ω
20 log(VOS/VIS)=-3db
VOS at Common OUT/IN
10
5
*
25
MHz
VOS at Any Channel
10
5
*
60
(-40db)
Feedthrough
Frequency (All
Channels OFF)
VEE=GND
RL=1k
Ω
20 log(VOS/VIS)=-40db
VOS at Common OUT/IN
10
5
*
10
VOS at Any Channel
10
5
*
8
(-40db)
Signal Crosstalk
Frequency
VEE=GND
RL=1k
Ω
20 log(VOS/VIS)=-40db
Between Sections :
Measured on Common
Measured on Any Chanel
6
10
THD
Total Harmonic
Distortion
VEE=GND
fIS=1kHz sine wave
5
10
15
2*
3*
5*
0.3
0.2
012
%
-
Address-or
Enable to Signal
Crosstalk
VEE=GND
RL=10k
Ω**
tr,tf=20ns
Square Wave
10
-
65
mv
(peak)
* Peak-to-peak voltage symmetrical about (VDD-VEE)/2
** Both ends of channel



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