SL4015BD datasheet(4/5 Pages) SLS

номер детали	SL4015BD

подробное описание детали	Dual 4-Stage Static Shift Register

PDF	5 Pages

Scroll/Zoom	100%

производитель	SLS [System Logic Semiconductor]

домашняя страница	http://www.slsemicon.co.kr/e_index.htm

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4 / 5 page

SL4015B

System Logic

Semiconductor

SLS

AC ELECTRICAL CHARACTERISTICS(C

L=50pF, RL=200k

Ω, Input t

r=tf=20 ns)

VCC

Guaranteed Limit

Symbol

Parameter

≥-55°C

°C

≤125°C

Unit

tmax

Maximum Clock Frequency (Figure 1)

5.0

8.5

1.5

4.25

MHz

tPHL, tPLH

Maximum Propagation Delay, Clock to Q (Figure

5.0

320

160

120

320

160

120

640

320

240

tPHL

Maximum Propagation Delay, Reset to Q (Figure

5.0

400

200

160

400

200

160

800

400

320

tTHL, tTLH

Maximum Output Transition Time, Any Output

(Figure 1)

5.0

200

100

200

100

400

200

160

CIN

Maximum Input Capacitance

7.5

TIMING REQUIREMENTS(C

L=50pF, RL=200 k

Ω, Input t

r=tf=20 ns)

VCC

Guaranteed Limit

Symbol

Parameter

≥-55°C

°C

≤125°C

Unit

Minimum Pulse Width, Clock (Figure 1)

5.0

180

360

160

100

Minimum Pulse Width, Reset (Figure 2)

5.0

200

400

160

120

tsu

Minimum Setup Time, Data to Clock

(Figure 3)

5.0

140

Minimum Hold Time, Clock to Data

(Figure 3)

5.0

tr, tf

Maximum Input Rise and Fall Time (Figure 1)

5.0

µs

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