15

SP690T/S/R DS/10

SP690T/S/R, 802/T/S/R, 804T/S/R, 805T/S/R Low Power Microprocessor Supervisory

© Copyright 2000 Sipex Corporation

Connecting an ordinary signal diode in series

with R3, as in Figure 22B, causes the lower trip

point (V

hysteresis (V

window occurs above V

vides additional noise margin without compro-

mising the accuracy of the power-fail threshold

when the monitored voltage is falling. It is

useful for accurately detecting when a voltage

falls past a threshold.

Figure 22A. Adding Additional Hysteresis to the Power-Fail Comparator.

Figure 22B. Shifting the Additional Hysteresis above V

PFT

The current through R1 and R2 should be at least

1

µA to ensure that the 25nA (max over extended

temperature range) PFI input current does not

shift the trip point. R3 should be larger than

10k

Ω so it does not load down the PFO pin.

Capacitor C1 adds additional noise rejection.

Figure 23. Using the Power-Fail Comparator to Monitor an Additional Power Supply

V

IN

R1

R2

+

R3

TO

µP

PFI

PFO

GND

V

CC

SP690T/S/R

SP802T/S/R

SP804T/S/R

SP805T/S/R

PFO

0V

0V

V

L

V

TRIP

V

H

V

IN

V

IN

R1

R2

+

R3

TO

µP

PFI

PFO

GND

V

CC

SP690T/S/R

SP802T/S/R

SP804T/S/R

SP805T/S/R

PFO

0V

0V

V

TRIP

V

H

V

IN

*OPTIONAL

V

V

V

WHERE V

V

R1 + R2

R2

(

)

V

(

R1

R2

R3

(

)

V

PFT

R1

R2

R3

R3

]

V

V

WHERE V

V

V

R1 + R2

R2

(

)

V

PFT

[

R1

R2

R3

R3

]

(

)

*C1

*C1

R1

R2

V-

PFI

PFO

GND

V

CC

SP690T/S/R

SP802T/S/R

SP804T/S/R

SP805T/S/R

PFO

V

L

V

TRIP

V-

V

IN

R1

R2

PFI

PFO

GND

V

CC

SP690T/S/R

SP802T/S/R

SP804T/S/R

SP805T/S/R

PFO

V

TRIP

V

H

V

IN

V

CC

0V

3.0V OR 3.3V

V

CC

V

V

WHERE V

V

NOTE: V

V

(

R1

R2

(

)

V

PFT

R1

R2

R3

]

[

- V

CC

R1

]

V

V

R1 + R2

R2

(

)

V

PFT

R2

)

(

)

A.)

B.)