SP211EHCT datasheet(6/16 Pages) SIPEX

6 / 16 page

SP207EHDS/08

SP207EH Series High Performance RS232 Transceivers

Figure 2. Charge Pump — Phase 2

Figure 3. Charge Pump Waveforms

+10V

a) C

GND

b) C

–

–10V

Phase 4

— V

DD transfer — The fourth phase of the clock

connects the negative terminal of C

2 to ground,

and transfers the generated l0V across C

2 to C4,

the V

DD storage capacitor. Again, simultaneously

with this, the positive side of capacitor C

1 is

switched to +5V and the negative side is

connected to ground, and the cycle begins again.

Since both V+ and V– are separately generated

from V

CC; in a no–load condition V

+ and V– will

be symmetrical. Older charge pump approaches

that generate V– from V+ will show a decrease in

the magnitude of V– compared to V+ due to the

inherent inefficiencies in the design.

The clock rate for the charge pump typically

operates at 15kHz. The external capacitors can

be as low as 0.1

µF with a 16V breakdown

voltage rating.

Transmitter/Driver

The drivers of the SP207EH Series can maintain

a typical data rate of 500Kbps. This superior

RS-232 data transmission rate makes the

SP207EH Series an ideal match for many

designs in personal computer peripherals and

LAN applications that demand high speed

performance.

The drivers are inverting transmitters, which

accept either TTL or CMOS inputs and output the

RS-232 signals with an inverted sense relative to

the input logic levels. Typically, the RS-232

output voltage swing is +9V with no load, and +5V

minimum with full load. The transmitter outputs

are protected against infinite short–circuits to

ground without degradation in reliability. The

drivers of the SP211EH, and SP213EH can be

tri–stated by using the SHUTDOWN function.

In the “power-off” state, the output impedance will

remain greater than 300 ohms, again satisfying the

RS-232 specifications. Should the input of the

driver be left open, an internal 400Kohm pullup

resistor to V

CC forces the input high, thus commit-

ting the output to a low state. The slew rate of the

transmitter output is internally limited to a maxi-

mum of 30V/

µsinordertomeettheEIAstandards

(EIA RS-232D 2.1.7, Paragraph 5). The transition

of the loaded output from high to low also meets

the monotonicity requirements of the standard.

VCC = +5V

–10V

VSS Storage Capacitor

VDD Storage Capacitor

–

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