MPL3115A2

Sensors

Freescale Semiconductor, Inc.

17

6.6.3

Reach Target Threshold Temperature (SRC_TTH)

Interrupt flag is set on reaching the value stored in the Temperature target register. Additionally a window value provides ability

to signal when the target is nearing from either above or below the value in the Temperature target register.

Note: When the window value is set to 0 then the interrupt will only be generated when reaching or crossing the target value.

6.6.4

Reach Window Target Temperature (SRC_TW)

The interrupt flag is set when the temperature value is within the window defined by the following formula:

Note: No interrupt is generated if the T_WND value is set to 0.

6.6.5

Pressure/Altitude Change (SRC_PCHG)

Interrupt flag is set if sequential Pressure/Altitude acquisitions exceed value stored in Pressure/Altitude window value register.

6.6.6

Temperature Change (SRC_TCHG)

Interrupt flag is set if sequential Temperature acquisitions exceed the value stored in Pressure/Altitude window value register.

6.6.7

Data Ready

Interrupt flag is set when new data or a data overwrite event has occurred. PTOW and/or PTDR (DR_STATUS register) must

be set for an interrupt to be generated.

6.6.8

FIFO Event

Interrupt flag is set when either an overflow or watermark event has occurred. For more information please see section 7.3.

6.7

Pressure/Altitude and Temperature Delta

Registers show the differences from the last Pressure/Altitude and Temperature samples.

6.8

Min/Max Data Value Storage

Registers record the minimum and maximum Pressure/Altitude and Temperature.

6.9

Digital Interface

6.9.1

The transaction on the bus is started through a start condition (START) signal. START condition is defined as a HIGH to LOW

transition on the data line while the SCL line is held HIGH. After START has been transmitted by the master, the bus is considered

busy. The next byte of data transmitted after START contains the slave address in the first 7 bits, and the eighth bit tells whether

the master is receiving data from the slave or transmitting data to the slave. When an address is sent, each device in the system

compares the first seven bits after a start condition with its address. If they match, the device considers itself addressed by the

master. The ninth clock pulse, following the slave address byte (and each subsequent byte) is the acknowledge (ACK). The trans-

mitter must release the SDA line during the ACK period. The receiver must then pull the data line low so that it remains stable

low during the high period of the acknowledge clock period.

Table 8. Serial Interface Pin Descriptions

Name

Description

SCL

SDA

Window

T_TGT

T_WND



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