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LTC4211

4211fb

OPERATION

breaker if the voltage across the SENSE resistor (VCC –

VSENSE = VCB) is greater than 50mV for 20μs. There may

be applications where this comparator’s response time

is not long enough, for example, because of excessive

supply voltage noise. To adjust the response time of the

SLOW COMP, the MS version of the LTC4211 is chosen

and a capacitor is used at the LTC4211’s FILTER pin (see

section on Adjusting SLOW Comp’s Response Time). The

FAST COMP trips the circuit breaker to protect against fast

load overcurrents if the transient voltage across the sense

resistor is greater than 150mV for 300ns. The response

time of the LTC4211’s FAST COMP is fixed.

The timing diagram of Figure 7 illustrates when the

LTC4211’s electronic circuit breaker is armed. After the

first timing cycle, the LTC4211’s FAST COMP is armed

at Time Point 5. Arming FAST COMP at Time Point 5 en-

sures that the system is protected against a short-circuit

condition during the second timing cycle. At Time Point 7,

SLOW COMP is armed when the internal control loop is

disengaged.

The timing diagrams in Figures 8 and 9 illustrate the op-

eration of the LTC4211 when the load current conditions

exceed the thresholds of the FAST COMP (VCB(FAST) >

150mV) and SLOW COMP (VCB(SLOW) > 50mV), respec-

tively.

RESETTING THE ELECTRONIC CIRCUIT BREAKER

Once the LTC4211’s circuit breaker is tripped, FAULT is

asserted low and the GATE pin is pulled to ground. The

LTC4211 remains latched OFF in this fault state until the

external fault is cleared. To clear the internal fault detect

circuitry and to restart the LTC4211, its ON pin must be

driven low (VON < 1.236V) for at least 150μs, after which

time FAULT goes high. Toggling the ON pin from low to

high (VON > 1.316V) initiates a restart sequence in the

LTC4211. The timing diagram in Figure 10 illustrates a

start-up sequence where the LTC4211 is powered up into

a load overcurrent condition. Note that the circuit breaker

trips at Time Point B and is reset at Time Point 9A.

FREQUENCY COMPENSATION AT SOFT-START

If the external gate capacitance is greater than 600pF, no

external gate capacitor is required at GATE to stabilize

the internal current-limiting loop during soft-start. Oth-

erwise, connect a gate capacitor between the GATE pin

and ground to increase the total gate capacitance to be

equal to or above 600pF. The servo loop that controls the

external MOSFET during current limiting has a unity-gain

frequency of about 105kHz and phase margin of 80° for

external MOSFET gate input capacitances to 2.5nF.

USING AN EXTERNAL GATE CAPACITOR

In addition to reducing the inrush current (Equation 4), an

external gate capacitor (Figure 6) may also be useful to

decrease or eliminate current spikes through the MOSFET

when power is first applied. At power-up, the instantaneous

input voltage step attempts to pull the MOSFET gate up

through the MOSFET’s drain-to-gate capacitance. If the

MOSFET’s CGS is small, the gate can be pulled up high

enough to turn on the MOSFET, thereby allowing a cur-

rent spike to the output. This event occurs during the time

that the LTC4211 is coming out of UVLO and getting its

intelligence to hold the GATE pin low. An external capaci-

tor attenuates the voltage to which the GATE is pulled up

and eliminates the current spike. The value required is

dependent on the MOSFET capacitance specifications. In

typical applications, this capacitor is not required.

ELECTRONIC CIRCUIT BREAKER

The LTC4211 features an electronic circuit breaker function

that protects against externally-generated fault conditions

and shorts or excessive load current and can also be con-

figured to protect against input supply overvoltage. If the

circuit breaker trips, the GATE pin is immediately pulled to

ground, the external N-channel MOSFET is quickly turned

OFF and FAULT is latched low.

The circuit breaker trips whenever the voltage across the

sense resistor exceeds two different levels, set by the

LTC4211’s SLOW COMP and FAST COMP thresholds

(see Block Diagram). The SLOW COMP trips the circuit

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