DM9332 datasheet(39/61 Pages) DAVICOM

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DM9332

10/100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter

Preliminary datasheet

DM9332-15-DS-P01

March 5, 2012

8.9 DAVICOM Specified Configuration and Status Register (DSCSR) – 11H

Bit

Bit Name

Default

Description

100FDX

1, RO

100M Full Duplex Operation Mode

After auto-negotiation is completed, results will be written to this bit. If this

bit is 1, it means the operation 1 mode is a 100M full duplex mode. The

software can read bit [15:12] to see which mode is selected after

auto-negotiation. This bit is invalid when it is not in the auto-negotiation

mode

100HDX

1, RO

100M Half Duplex Operation Mode

After auto-negotiation is completed, results will be written to this bit. If this

bit is 1, it means the operation 1 mode is a 100M half duplex mode. The

software can read bit [15:12] to see which mode is selected after

auto-negotiation. This bit is invalid when it is not in the auto-negotiation

mode

10FDX

1, RO

10M Full Duplex Operation Mode

After auto-negotiation is completed, results will be written to this bit. If this

bit is 1, it means the operation 1 mode is a 10M Full Duplex mode. The

software can read bit [15:12] to see which mode is selected after

auto-negotiation. This bit is invalid when it is not in the auto-negotiation

mode

10HDX

1, RO

10M Half Duplex Operation Mode

After auto-negotiation is completed, results will be written to this bit. If this

bit is 1, it means the operation 1 mode is a 10M half duplex mode. The

software can read bit [15:12] to see which mode is selected after

auto-negotiation. This bit is invalid when it is not in the auto-negotiation

mode

Reserved

0, RO

Reserved

Read as 0, ignore on write

Reserved

0,RW

Reserved

0,RW

Reserved

8-4

PHYADR[4:

0 or 1, RW

PHY Address Bit 4:0

The first PHY address bit transmitted or received is the MSB of the

address (bit 4). A station management entity connected to multiple PHY

entities must know the appropriate address of each PHY

Auto-negotiation Monitor Bits

These bits are for debug only. The auto-negotiation status will be written

to these bits.

B3 B2 B1 B0

In IDLE state

Ability match

Acknowledge match

Acknowledge match fail

Consistency match

Consistency match fail

Parallel detects signal link ready

Parallel detects signal link ready fail

3-0

ANMB[3:0]

0, RO

Auto-negotiation completed successfully

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