DM9006 datasheet(39/76 Pages) DAVICOM

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DM9006

2-port Switch with Processor Interface

Preliminary datasheet

DM9006-13-DS-P01

September 1, 2009

7. EEPROM FORMAT

name

Word

Description

MAC address

0~2

6 Byte Ethernet Address

Auto Load Control

Bit[1:0] = 01: Accept Setting of WORD4 and WORD5

Bit[3:2] = 01: Accept setting of WORD6 [4:0]

Bit[5:4] = Reserved

Bit[7:6] = 01: Accept setting of WORD7 [3:0]

Bit[9:8] = 01: Accept setting of WORD8 [4:0]

Bit[11:10] = 01: Accept setting of WORD7[13:8]

Bit[13:12] = Reserved

Bit[15:14] = 01: Accept setting of WORD7 [15:14]

Vendor ID

2 byte vendor ID (Default: 0A46H)

Product ID

2 byte product ID (Default: 9013H)

pin control

When word 3 bit [3:2] =01, these bits can control the CS#, IOR#, IOW#

and IRQ pins polarity.

Bit[0]

0: CS# pin is active low (default)

1: CS# pin is active high

Bit[1]

0: IOR# pin is active low (default)

1: IOR# pin is active high

Bit[2]

0: IOW# pin is active low (default)

1: IOW# pin is active high

Bit[3]

0: IRQ pin is active high (default)

1: IRQ pin is active low

Bit[4]

0: IRQ pin is force output (default)

1: IRQ pin is open-collected

Bit [15:5] = Reserved

PHY control

Bit[0]

0: The WOL pin is active high (default)

1: The WOL pin is active low

Bit[1]

0: The WOL pin is in level mode (default)

1: The WOL pin is in pulse mode

Bit[2]

0: magic wakeup event is disable (default)

1: magic wakeup event is enabled

Bit[3]

0: link change wakeup event is disable (default)

1: link change wakeup event is enabled

Bit[7:4] = Reserved

Bit[8] = LED mode

0: LED in normal mode (default, description see chapter 5.5)

1: LED be changed to following mode

LNK0_LED/LNK1_LED active low indicates traffic active

FDX0_LED/FDX1_LED active low indicates 100Mbps mode

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