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LTC5591 датащи(PDF) 18 Page - Linear Technology

номер детали LTC5591
подробное описание детали  Dual 1.6GHz to 2.7GHz High Dynamic Range Downconverting Mixer
PDF  20 Pages
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производитель  LINER [Linear Technology]
домашняя страница  http://www.linear.com
Logo LINER - Linear Technology

LTC5591 датащи(HTML) 18 Page - Linear Technology

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LTC5592
18
5592f
Enable Interface
Figure 13 shows a simplified schematic of the ENA pin
interface (ENB is identical). To enable channel A, the ENA
voltage must be greater than 2.5V. If the enable function
is not required, the enable pin can be connected directly
to VCC. The voltage at the enable pin should never exceed
the power supply voltage (VCC) by more than 0.3V. If this
should occur, the supply current could be sourced through
the ESD diode, potentially damaging the IC.
APPLICATIONS INFORMATION
The Enable pins must be pulled high or low. If left float-
ing, the on/off state of the IC will be indeterminate. If a
three-state condition can exist at the enable pins, then a
pull-up or pull-down resistor must be used.
Supply Voltage Ramping
Fast ramping of the supply voltage can cause a current
glitch in the internal ESD protection circuits. Depending on
the supply inductance, this could result in a supply volt-
age transient that exceeds the maximum rating. A supply
voltage ramp time of greater than 1ms is recommended.
Spurious Output Levels
Mixer spurious output levels versus harmonics of the RF
and LO are tabulated in Tables 7 and 8 for frequencies up
to 10GHz. The spur levels were measured on a standard
evalution board using the test circuit shown in Figure 1.
The spur frequencies can be calculated using the follow-
ing equation:
fSPUR = (M • fRF) – (N • fLO)
Table 7. IF Output Spur Levels (dBc), High Side LO
(RF = 1950MHz, PRF = –3dBm, PLO = 0dBm, VCC = VCCIF = 3.3V, TC = 25°C)
N
M
0
1
23
4
5
678
9
0
–
–45.2 –46.9 –68.4 –70.8 –75.3 –72.0 –82.0
1 –51.0
0
–64.4 –54.5 –68.1 –66.3 –74.9 –72.2
2 –80.0 –80.9 –60.6
*
–81.4
*
*
*
*
3
*
–83.5
*
–75.8
*
*
*
*
*
*
4
*
*
**
*
*
***
*
5
*
*
**
*
*
***
*
6
*
*
**
*
*
***
*
7
*
*
**
*
*
***
*
8
*
*
**
**
*
*
*
9
**
*
*
***
*
10
**
**
*
*
*
*Less than –90dBc
Table 8. IF Output Spur Levels (dBc), Low Side LO
(RF = 2350MHz, PRF = –3dBm, PLO = 0dBm, VCC = VCCIF = 3.3V, TC = 25°C)
N
M
0
1
234
5
6
7
8
9
0
–
–44.9 –46.2 –69.9 –69.7 –78.0 –71.9
1 –50.7
0
–63.1 –45.7 –67.0 –68.9 –71.1 –72.2
*
2 –77.8 –78.7 –66.5
*
–89.1
*
*
*
*
*
3
*
*
*
–70.1
*
*
*
*
*
*
4
*
*
*
*
*
**
***
5
*
*
*
*
*
**
***
6
*
*
*
*
*
**
***
7
*
*
*
*
**
***
8
*
*
*
**
***
9
*
*
**
***
10
*
*
*
***
*Less than –90dBc
Figure 13. ENA Interface Schematic
LTC5592
17
ENA
500Ω
VCCA
5592 F13
19
ESD
CLAMP



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