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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HT67F50 датащи(PDF) 28 Page - Holtek Semiconductor Inc |
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HT67F50 датащи(HTML) 28 Page - Holtek Semiconductor Inc |
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28 / 242 page  Rev. 1.50 28 March 06 , 2012 Rev. 1.50 29 March 06 , 2012 HT67F30/HT67F40/HT67F50/HT67F60 TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPRO Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions tINT Interrupt pulse width — — 1 — — tSYS tLVR Low Voltage Width to Reset — — 120 240 480 μs tLVD Low Voltage Width to Interrupt — — 20 45 90 μs tLVDS LVDO stable time — For all VLVD, LVR disable 15 — — μs — For VLVD disable, LVR enable 25 — — μs tBGS VBG turn on stable time — — 10 — — ms tAD A/D Clock Period 2.7~5.5V — 0.5 — 100 μs tADC AD Conversion Time(note2) 2.7~5.5V 12 bit ADC — 16 — tAD tON2ST (#) ADC on to ADC start 2.7~5.5V — 2 — — μs tEERD EEPROM Read Time — — 1 2 4 tSYS tEEWR EEPROM Write Timet — — 1 2 4 ms ADC Characteristics Ta=25°C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions AVDD ADC Operating Voltage — — 2.7 — 5.5 V VADI AD Input Voltage — — 0 — VREF V VREF ADC Reference Voltage — — 2 — AVDD V DNL Differential Non-linearity 5V tAD= 1.0μs — 1 2 LSB INL Integral Non-linearity 5V tAD= 1.0μs — 2 4 LSB IADC Additional Power Consumption if A/D Converter is Used 3V No load, tAD= 0.5μs — 0.90 1.35 mA 5V No load, tAD= 0.5μs — 1.20 1.80 mA tADCK A/D Clock Period — — 0.5 — 10 μs tADC A/D Conversion Time (Include A/D Sample and Hold Time) — 12-bit ADC — 16 — tADCK tSH A/D Sampling Time — — — 4 — tADCK Note: 1. tSYS=1/fSYS 2. * For fERC, as the resistor tolerance will influence the frequency a precision resistor is recommended. 3. To maintain the accuracy of the internal HIRC oscillator frequency, a 0.1μF decoupling capacitor should be connected between VDD and VSS and located as close to the device as possible. |
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