DSPIC33FJ06GS101 datasheet(21/386 Pages) MICROCHIP

21 / 386 page

DS70318F-page 21

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04

2.5

ICSP™ Pins

The PGECx and PGEDx pins are used for In-Circuit

Serial

Programming™

(ICSP™)

and

debugging

purposes. It is recommended to keep the trace length

between the ICSP connector and the ICSP pins on the

device as short as possible. If the ICSP connector is

expected to experience an ESD event, a series resistor

is recommended, with the value in the range of a few

tens of Ohms, not to exceed 100 Ohms.

Pull-up resistors, series diodes, and capacitors on the

PGECx and PGEDx pins are not recommended as they

will

interfere

with

the

programmer/debugger

communications to the device. If such discrete

components are an application requirement, they

should be removed from the circuit during program-

ming and debugging. Alternatively, refer to the AC/DC

characteristics and timing requirements information in

the respective device Flash programming specification

for information on capacitive loading limits and pin input

voltage high (VIH) and input low (VIL) requirements.

Ensure that the “Communication Channel Select”

(i.e., PGECx/PGEDx pins) programmed into the device

matches the physical connections for the ICSP to

MPLAB® ICD 3 or MPLAB® REAL ICE™.

For more information on ICD 3 and REAL ICE

connection

requirements,

refer

the

following

documents that are available on the Microchip website.

• “Using MPLAB® ICD 3” (poster) DS51765

• “MPLAB® ICD 3 Design Advisory” DS51764

• “MPLAB® REAL ICE™ In-Circuit Debugger

User's Guide” DS51616

• “Using MPLAB® REAL ICE™” (poster) DS51749

2.6

External Oscillator Pins

Many DSCs have options for at least two oscillators: a

high-frequency primary oscillator and a low-frequency

secondary oscillator (refer to Section 8.0 “Oscillator

Configuration” for details).

The oscillator circuit should be placed on the same

side of the board as the device. Also, place the

oscillator circuit close to the respective oscillator pins,

not

exceeding

one-half

inch

(12 mm)

distance

between them. The load capacitors should be placed

next to the oscillator itself, on the same side of the

board. Use a grounded copper pour around the

oscillator circuit to isolate them from surrounding

circuits. The grounded copper pour should be routed

directly to the MCU ground. Do not run any signal

traces or power traces inside the ground pour. Also, if

using a two-sided board, avoid any traces on the

other side of the board where the crystal is placed. A

suggested layout is shown in Figure 2-3.

FIGURE 2-3:

SUGGESTED PLACEMENT

OF THE OSCILLATOR

CIRCUIT

2.7

Oscillator Value Conditions on

Device Start-up

If the PLL of the target device is enabled and

configured for the device start-up oscillator, the

maximum oscillator source frequency must be limited

to 4 MHz < FIN < 8 MHz to comply with device PLL

start-up conditions. This means that if the external

oscillator

frequency

outside

this

range,

the

application must start up in the FRC mode first. The

default PLL settings after a POR with an oscillator

frequency outside this range will violate the device

operating speed.

Once the device powers up, the application firmware

can initialize the PLL SFRs, CLKDIV, and PLLDBF to a

suitable value, and then perform a clock switch to the

Oscillator + PLL clock source. Note that clock switching

must be enabled in the device Configuration word.

Main Oscillator

Guard Ring

Guard Trace

Secondary

Oscillator

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