PCF8563

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CLKOUT output

A programmable square wave is available at the CLKOUT pin. Operation is controlled by

the CLKOUT frequency register (address 0DH). Frequencies of32.768 kHz (default), 1024,

32 and 1 Hz can be generated for use as a system clock, microcontroller clock, input to a

charge pump, or for calibration of the oscillator. CLKOUT is an open-drain output and

enabled at power-on. If disabled it becomes high-impedance.

Reset

The

PCF8563 includes an internal reset circuit which is active whenever the oscillator is

the address pointer, are cleared with the exception of bits FE, VL, TD1, TD0, TESTC

and AE which are set to logic 1.

Voltage-low detection

Voltage-low detector and clock monitor

The

PCF8563 has an on-chip voltage-low detector.

Low, bit 7 in the Seconds register) is set to

indicate that reliable clock/calendar information

is no longer guaranteed. The VL flag can only

be cleared by software.

The VL bit is intended to detect the situation

will be set. This will indicate that the time may be corrupted.

Registers Organization

Table 1 registers overview

Bit positions labelled as ‘- ’are not implemented; those labelled with ‘0’ should always be

written with logic 0.