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ICS9LPRS501 датащи(PDF) 13 Page - Integrated Device Technology |
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ICS9LPRS501 датащи(HTML) 13 Page - Integrated Device Technology |
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13 / 28 page ![]() IDTTM/ICSTM 64-pin CK505 w/Fully Integrated Voltage Regulator + Integrated Series Resistor 1121F—02/23/09 Advance Information ICS9LPRS501 64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR 13 AC Electrical Characteristics - Input/Common Parameters PARAMETER SYMBOL CONDITIONS MIN MAX UNITS Notes Clk Stabilization T STAB From VDD Power-Up or de- assertion of PD# to 1st clock 1.8 ms 1 Tdrive_SRC T DRSRC SRC output enable after PCI_STOP# de-assertion 15 ns 1 Tdrive_PD# T DRPD Differential output enable after PD# de-assertion 300 us 1 Tdrive_CPU T DRSRC CPU output enable after CPU_STOP# de-assertion 10 ns 1 Tfall_PD# T FALL 5ns 1 Trise_PD# T RISE 5ns 1 Fall/rise time of PD#, PCI_STOP# and CPU_STOP# inputs AC Electrical Characteristics - Low Power Differential Outputs PARAMETER SYMBOL CONDITIONS MIN MAX UNITS NOTES Rising Edge Slew Rate t SLR Differential Measurement 2.5 8 V/ns 1,2 Falling Edge Slew Rate t FLR Differential Measurement 2.5 8 V/ns 1,2 Slew Rate Variation t SLVAR Single-ended Measurement 20 % 1 Maximum Output Voltage V HIGH Includes overshoot 1150 mV 1 Minimum Output Voltage V LOW Includes undershoot -300 mV 1 Differential Voltage Swing V SWING Differential Measurement 300 mV 1 Crossing Point Voltage V XABS Single-ended Measurement 300 550 mV 1,3,4 Crossing Point Variation V XABSVAR Single-ended Measurement 140 mV 1,3,5 Duty Cycle D CYC Differential Measurement 45 55 % 1 CPU Jitter - Cycle to Cycle CPUJ C2C Differential Measurement 85 ps 1 SRC Jitter - Cycle to Cycle SRCJ C2C Differential Measurement 125 ps 1 DOT Jitter - Cycle to Cycle DOTJ C2C Differential Measurement 250 ps 1 CPU[1:0] Skew CPU SKEW10 Differential Measurement 100 ps 1 CPU[2_ITP:0] Skew CPU SKEW20 Differential Measurement 150 ps 1 SRC[10:0] Skew SRC SKEW Differential Measurement 3000 ps 1 Electrical Characteristics - PCICLK/PCICLK_F PARAMETER SYMBOL CONDITIONS MIN MAX UNITS NOTES Long Accuracy ppm see Tperiod min-max values -300 300 ppm 1,6 33.33MHz output nominal 30.00900 ns 6 33.33MHz output spread 30.15980 ns 6 Absolute min/max period T abs 33.33MHz output nominal/spread 29.49100 30.65980 ns 6 Output High Voltage V OH I OH = -1 mA 2.4 V 1 Output Low Voltage V OL I OL = 1 mA 0.4 V 1 V OH @MIN = 1.0 V -33 mA 1 V OH@MAX = 3.135 V -33 mA 1 V OL @ MIN = 1.95 V 30 mA 1 V OL @ MAX = 0.4 V 38 mA 1 Rising Edge Slew Rate t SLR Measured from 0.8 to 2.0 V 1 4 V/ns 1 Falling Edge Slew Rate t FLR Measured from 2.0 to 0.8 V 1 4 V/ns 1 Duty Cycle d t1 V T = 1.5 V 45 55 % 1 Skew t skew V T = 1.5 V 250 ps 1 Intentional PCI-PCI delay t delay V T = 1.5 V ps 1,9 Jitter, Cycle to cycle t jcyc-cyc V T = 1.5 V 500 ps 1 200 nominal Clock period 29.99100 T period Output High Current I OH Output Low Current I OL |
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