1626

09/17/09

ICS9DS400

Four Output Differential Buffer for PCIe for Gen 2 with Spread

2

Advance Information

Pin Configuration

Power Groups

VDD 1

28 VDDA

SRC_IN 2

27 GNDA

SRC_IN# 3

26 IREF

GND 4

25 OE_INV

VDD 5

24 VDD

DIF_1 6

23 DIF_6

DIF_1# 7

22 DIF_6#

OE_1 8

21 OE_6

DIF_2 9

20 DIF_5

DIF_2# 10

19 DIF_5#

VDD 11

18 VDD

BYPASS#_SSCG 12

17 SPREAD_EN

SCLK 13

16 DIF_STOP#

SDATA 14

15 PD#

OE_INV = 0

VDD 1

28 VDDA

SRC_IN 2

27 GNDA

SRC_IN# 3

26 IREF

GND 4

25 OE_INV

VDD 5

24 VDD

DIF_1 6

23 DIF_6

DIF_1# 7

22 DIF_6#

OE1# 8

21 OE6#

DIF_2 9

20 DIF_5

DIF_2# 10

19 DIF_5#

VDD 11

18 VDD

BYPASS#_SSCG 12

17 SPREAD_EN

SCLK 13

16 DIF_STOP

SDATA 14

15 PD

OE_INV = 1

See Pin Description Table for pins w/internal pull up or pull down

See Pin Description Table for pins w/internal pull up or pull down

VDD

GND

1

4

SRC_IN/SRC_IN#

5,11,18, 24

4

DIF(1,2,5,6)

N/A

27

IREF

28

27

Analog VDD &

GND for PLL core

Pin Number

Description