epc110

Parameters

The parameters are defining the functionality of the epc110. The big variety of possible settings allows to cover a wide range of applications.

The devices contains a memory to store the application parameters. They are stored into 16bit registers. The registers are organized into

2 blocks: a volatile and a non-volatile one.

Parameter Memory Organization (epc110)

The following classes of data are stored for each device:

•

Application parameters

•

Unique chip ID and chip adjustments (factory set)

This data can be permanently stored in a read-only memory (ROM)1 and is mirrored in a volatile memory (RAM). At power up, the data

(except the chip ID) is copied from the ROM to the RAM. During operation, the data from the RAM is used. Both memories are organized in

16 registers at 16 bits each. The data can be accessed on a 16-bit register base.

If a register has been burned (=stored into the ROM) the first bit is set: FUSEBIT = 1. If VMOD = 1 is selected, the register cannot be modified

any more nor in RAM nor in ROM area. For VMOD = 0 the RAM area is still accessible.

So far the chip can be operated in two different modes:

•

Fix-parameter mode VMOD = 1: e.g. as standalone or pre-configured device

Operated with not modifiable data from RAM, which are stored permanently in ROM.

•

Dynamic mode VMOD = 0: e.g. for adaptive systems, dynamic systems

Operated with modifiable data from RAM. The SPI interface allows to modify these data in the RAM area at any time on the fly.

At power up these data are loaded from the permanent stored data in the ROM. If the run-time configuration differs from the data set

stored in the ROM, it has to be restored after each power-up again by the external micro-processor over the SPI interface.

The following table shows the memory organization:

Non-Volatile Memory Address Range

(Register no.)

Volatile Memory Address Range

(Register no.)

Description

0 - 3

16 - 19

Application parameters

4 - 6

20 - 22

Trim values, factory set

7

23

Device Address (not applicable)

8 - 15

-

Chip ID, factory set

-

24 - 31

For factory test purpose. Read only.

Table 3: Memory map overview

As shown in the table above, registers 0 – 3 are used for configuring the chip in the application. Before the devices can be used in a final light-

barrier system, the required application parameters of the chip in the system have to be stored into the device memory.

The following table shows the allocation of the available parameters in the memory of the epc110:

Bit #

ROM RAM

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

0

MODE

1

0

0

0

0

0

0

TPULSE

POL FUSEBIT

1

17

TPER

DEC

0

0

INC

0

0

FUSEBIT

2

18

0

0

0

0

1

0

1

0

1

SENSH

SENSN

FUSEBIT

3

19

don't use

FUSEBIT

4

20

don't use

FUSEBIT

Trimming

5

21

don't use

FUSEBIT

6

22

don't use

FUSEBIT

7

23

don't use

FUSEBIT Device Address

8

24

Lot no. LSB

FUSEBIT

Chip ID

9

25

Lot no. MSB

FUSEBIT

10

26

Chip ID

FUSEBIT

11

27

Factory use only

FUSEBIT

12

28

Revision no.

FUSEBIT

13

29

no function

FUSEBIT

14

30

no function

FUSEBIT

15

31

no function

FUSEBIT

Application

parameters

Figure 12: Detailed memory map epc110

1 The non-volatile memory is a one-time-programmable memory (OTP). Once the memory is programmed, the programmed values cannot be

overwritten anymore.

© 2011 ESPROS Photonics Corporation

Characteristics subject to change without notice

11

Datasheet epc110 - V2.1

www.espros.ch