SIP11203 datasheet(3/18 Pages) VISHAY

3 / 18 page

Document Number: 73868

S11-0975–Rev. C, 16-May-11

www.vishay.com

Vishay Siliconix

SiP11203, SiP11204

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Parameter

Symbol

Test Conditions

Unless Otherwise Specified

5.5 V

 V

IN  13 V

TA = - 40 °C to 85 °C

Limits

Unit

Min.a

Typ.b

Max.a

Logic Inputs - IN A and IN B

Input High

VIH

Rising

4.0

2.5

Input Low

VIL

Falling

2.1

1.0

Input Resistance

RIN

VIN = 13 V, 13 V at INA and/or INB

3.0

3.8

4.5



Input Frequency Range (INA and

INB)

fIN

(Note c)

100

500

kHz

Error Amplifier - DC Electrical Characteristics

Voltage Gain

20 log (

V

OUT/VOS) for VOUT = 0.5 V to 3.0 V

Common Mode Rejection Ratio

CMRR

Input CMR = 0 V to 3.5 V

Input Offset Voltage

VOS

VCM = 1.225 V, RLOAD = 10 k to VCM

± 3

± 15

VOS Temperature Coefficient

TC3

(Note c)

µV/°C

Input Bias Current

IBIAS

VCM = 1.225 V

210

Input Offset Current

IOS

(IEA+) - (IEA-), (Note c)

± 0.3

Output Voltage

VOL

Output sinking 0.8 mA

225

400

VOH

Output sourcing 0.8 mA

3.0

3.45

Output Current

IOH

Sourcing, EAOUT = 1.0 V, EA+ overdrive = 500 mV

3.5

4.7

IOL

Sinking, EAOUT = 2.5 V, EA+ overdrive = 500 mV

0.8

1.3

Error Amplifier - AC Electrical Characteristics

Gain-Bandwidth Product

(Note c)

MHz

Slew Rate

SR+

Rising, RLOAD = 2 k II 1 nf to Ground

0.75

V/µs

SR-

Falling, RLOAD = 2 k II 1 nf to Ground

MOSFET Drivers

Driver Impedance

RD(SOURCE)

VIN = 5.5 V, IOUT = 100 mA, TJ = 25 °C

2.3

3.7



RD(SINK)

1.5

2.4

RD(SOURCE)

VIN = 7.5 V, IOUT = 100 mA, TJ = 25 °C

2.1

3.4

RD(SINK)

1.4

2.2

Peak Drive Current

IPK(SOURCE)

VIN = 5.5 V, TJ = 25 °C (Note c)

1.2

IPK(SINK)

2.4

IPK(SOURCE)

VIN = 7.5 V, TJ = 25 °C (Note c)

2.2

IPK(SINK)

4.0

Rise Time

10 % to 90 %, VIN = 5.5 V, CLOAD = 6 nF, (Note c)

10 % to 90 %, VIN = 7.5 V, CLOAD = 6 nF, (Note c)

Fall Time

90 % to 10 %, VIN = 5.5 V, CLOAD = 6 nF, (Note c)

90 % to 10 %, VIN = 7.5 V, CLOAD = 6 nF, (Note c)

IN to OUT Propagation Delay

tpdr

INA/INB rising to OUTA/OUTB rising, 50 % to 50 %

VIN = 5.5 V, RDEL connected to VL, CLOAD = 0 nF

tpdf

INA/INB falling to OUTA/OUTB falling, 50 % to 50 %

VIN = 5.5 V, RDEL connected to VL, CLOAD = 0 nF

Additional Rising Edge OUT A/B

Delay vs. RDEL

t

DELAY

RDEL connected to VL

RDEL = 25 k to GND, CLOAD = 0 nF (Note d)

Power-down Detection Timeout

tPDDET

IN A and IN B low to OUT A/OUT B low

RPD = 25 k, CPD = 1 nF (Note c)

µs

Power-up Output Hold-off Current

IHOFF

No forcing voltage on VIN or VL, both VIN and VL

bypassed by 1 µF to GND, INA or INB = 5 V, other

input = 0 V, force 1 V at active output (A or B)

350

530

SPECIFICATIONS

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