HT82B60R datasheet(21/70 Pages) HOLTEK

21 / 70 page

HT82B60R

Rev. 1.10

February 1, 2011

org 04h

; USB interrupt vector

reti

org 08h

; Timer/Event Counter interrupt vector

jmp tmr0int

; jump here when Timer0 overflows

org 20h

; main program

;internal Timer/Event Counter 0 interrupt routine

Tmr0int:

; Timer/Event Counter 0 main program placed here

reti

begin:

;setup Timer registers

mov a,09bh

; setup Timer preload value

mov tmr0,a;

mov a,080h

; setup Timer control register

mov tmr0c,a

; timer mode

; setup interrupt register

mov a,005h

; enable master interrupt and timer interrupt

INTC0,a

set tmr0c.4

; start Timer/Event Counter - note mode bits must be previously setup

Interrupts

Interrupts are an important part of any microcontroller

system. When an internal function such as a

Timer/Event Counter overflow or a USB interrupt occur

or an external event or SPI/I

2C interrupt occur , their cor-

responding interrupt will enforce a temporary suspen-

sion of the main program allowing the microcontroller to

direct attention to their respective needs. The external

interrupt is controlled by the action of the external inter-

rupt pin, while the internal interrupts are controlled by

the Timer/Event Counter overflow, USB interrupt or re-

ception.

Interrupt Register

Overall interrupt control, which means interrupt enabling

and request flag setting, is controlled by two interrupt

control registers. By controlling the appropriate enable

bits in these registers each individual interrupt can be

enabled or disabled. Also when an interrupt occurs, the

corresponding

request

flag

will

set

the

microcontroller. The global enable flag if cleared to zero

will disable all interrupts.

Interrupt Operation

When an interrupt occurs, if their appropriate interrupt

enable bit is set, the Program Counter, which stores the

address of the next instruction to be executed, will be

transferred onto the stack. The Program Counter will

then be loaded with a new address which will be the

value of the corresponding interrupt vector. The

microcontroller will then fetch its next instruction from

this interrupt vector. The instruction at this vector will

usually be a JMP statement which will jump to another

section of program which is known as the interrupt ser-

vice routine. Here is located the code to control the ap-

propriate interrupt. The interrupt service routine must be

terminated with a RETI statement, which retrieves the

original Program Counter address from the stack and al-

lows the microcontroller to continue with normal execu-

tion at the point where the interrupt occurred.

The various interrupt enable bits, together with their as-

sociated request flags, are shown in the accompanying

diagram with their order of priority.

Once an interrupt subroutine is serviced, all the other in-

terrupts will be blocked, as the EMI bit will be cleared au-

tomatically. This will prevent any further interrupt nesting

from occurring. However, if other interrupt requests oc-

cur during this interval, although the interrupt will not be

immediately serviced, the request flag will still be re-

corded. If an interrupt requires immediate servicing

while the program is already in another interrupt service

routine, the EMI bit should be set after entering the rou-

tine, to allow interrupt nesting. If the stack is full, the in-

terrupt request will not be acknowledged, even if the

related interrupt is enabled, until the Stack Pointer is

decremented. If immediate service is desired, the stack

must be prevented from becoming full.

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