HT46R005 datasheet(43/62 Pages) HOLTEK

43 / 62 page

HT48R005/HT46R005

Rev. 1.00

November 29, 2011

Interrupts

Interrupts are an important part of any microcontroller

system. When an external event or an internal function

such as a Timer/Event Counter require microcontroller

attention, their corresponding interrupt will enforce a

temporary suspension of the main program allowing the

microcontroller to direct attention to their respective

needs.

The devices contain a single external interrupt and mul-

tiple internal interrupts. The external interrupt is con-

trolled by the action of the external interrupt pin, while

the internal interrupt is controlled by the Timer/Event

Counters overflow.

Interrupt Register

Overall interrupt control, which means interrupt enabling

and request flag setting, is controlled by using the regis-

ter, INTC0. By controlling the appropriate enable bits in

this registers each individual interrupt can be enabled or

disabled. Also when an interrupt occurs, the corre-

sponding request flag will be set by the microcontroller.

The global enable flag if cleared to zero will disable all

interrupts.

Interrupt Operation

A Timer/Event Counter overflow or an active edge on

the external interrupt pin will all generate an interrupt re-

quest by setting their corresponding request flag, if their

appropriate interrupt enable bit is set. When this hap-

pens, the Program Counter, which stores the address of

the next instruction to be executed, will be transferred

onto the stack. The Program Counter will then be loaded

with a new address which will be the value of the corre-

sponding interrupt vector. The microcontroller will then

fetch its next instruction from this interrupt vector. The

instruction at this vector will usually be a JMP statement

which will jump to another section of program which is

known as the interrupt service routine. Here is located

the code to control the appropriate interrupt. The inter-

rupt service routine must be terminated with a RETI in-

struction, which retrieves the original Program Counter

address from the stack and allows the microcontroller to

continue with normal execution at the point where the in-

terrupt occurred.

The various interrupt enable bits, together with their as-

sociated request flags, are shown in the following dia-

gram with their order of priority.

Once an interrupt subroutine is serviced, all the other in-

terrupts will be blocked, as the EMI bit will be cleared au-

tomatically. This will prevent any further interrupt nesting

from occurring. However, if other interrupt requests oc-

cur during this interval, although the interrupt will not be

immediately serviced, the request flag will still be re-

corded. If an interrupt requires immediate servicing

while the program is already in another interrupt service

routine, the EMI bit should be set after entering the rou-

tine, to allow interrupt nesting. If the stack is full, the in-

terrupt request will not be acknowledged, even if the

related interrupt is enabled, until the Stack Pointer is

decremented. If immediate service is desired, the stack

must be prevented from becoming full.

A u t o m a t i c a l l y C l e a r e d b y I S R

M a n u a l l y S e t o r C l e a r e d b y S o f t w a r e

E x t e r n a l I n t e r r u p t

R e q u e s t F l a g I N T F

T i m e r / E v e n t C o u n t e r

I n t e r r u p t R e q u e s t F l a g T 0 F

E E I

E T 0 I

E M I

P r i o r i t y

H i g h

L o w

I n t e r r u p t

P o l l i n g

A D I

A / D C o n v e r s i o n

I n t e r r u p t R e q u e s t F l a g A D F

A u t o m a t i c a l l y D i s a b l e d w h e n i n t e r r u p t

e v e n t i s s e r v i c e d E n a b l e d m a n u a l l y o r

a u t o m a t i c a l l y w i t h R E T I i n s t r u c t i o n

E M I

Note: HT48R005 hasn

¢t ADC interrupt.

Interrupt Scheme

HT46R005 датащи(PDF) 43 Page - Holtek Semiconductor Inc

HT46R005 датащи(HTML) 43 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62

датащи скачать

ссылки URL