LCS700-708 datasheet(15/26 Pages) POWERINT

15 / 26 page

Rev. B 062011

LCS700-708

www.powerint.com

start-up frequency, and f

START, which is the burst mode start

(lower) threshold frequency.

The FEEDBACK pin current at start-up is determined by the value

of R

START because the voltage on CSTART will be zero. For minimum

start-up peak currents, this current should match or slightly

exceed the DT/BF pin current so that start-up switching frequency

begins at f

MAX. The resulting value of RSTART will be approximately

10% lower than the value of the pull-up resistor on the DT/BF pin.

The frequency will slide down as C

START charges. If RSTART is

smaller than that which provides start-up at f

MAX, it will create an

additional delay before start-up switching. Please see the PIXls

HiperLCS spreadsheet.

Resistor R

LOAD provides a load on the optocoupler, and speeds

up the large signal transient response during burst mode. The

recommended value is ~4.7 kW. Diode D1 prevents R

LOAD from

loading R

FMIN when the optocoupler is cut off. Diode D1 can be

omitted and a combination of resistor values found to achieve the

desired f

MIN but the resulting tolerances will be poor. Resistor

OPTO will improve the ESD and surge immunity of the PSU. It

also improves burst mode output ripple voltage. Its maximum

value must be such that the FEEDBACK pin current is equal to

the DT/BF pin current when the optocoupler is in saturation and

the FEEDBACK pin is at 2.0 V (please see PIXls HiperLCS

spreadsheet). This is to ensure that if the HiperLCS does not exit

start-up mode, because the feedback loop did not allow the

switching frequency to drop below f

STOP, then it can regulate at

light load by bursting at f

MAX. Note however bursting at fMAX can

lead to high internal dissipation due to loss of ZVS and should be

avoided. See Figure 20.

Capacitor C

START should be sized at the minimum possible value

that exhibits a 7 consecutive-cycle peak current at start-up that is

just below the peak current measured at brown-out and full load.

A larger value will slow down start-up and will make it more likely

that f

STOP is not reached. This can prevent exiting start-up mode

when the HiperLCS is powered up at high-line and minimum load,

and may subsequently cause the HiperLCS to burst at f

MAX

instead of between f

START and fSTOP.

Figure 19. Feedback Network Shown with Additional Load Resistor.

~850 kHz

10 s / div

IPRI

850 ns / div

Severe Loss of ZVS

Bursting Duty ≈ 50%

VHB

Figure 20. Bursting at f

MAX Causes High Internal Dissipation Due to Loss of

ZVS and Should be Avoided.

RFMIN

RSTART

ROPTO

RLOAD

3.4 V

U1B

CSTART

CFB

4.7 nF

GND

VREF

PI-6118-051711

Figure 21. VREF to FB External Resistance vs. Frequency.

In order to calculate R

FMIN and RSTART, use the following equation

which describes nominal resistance from FEEDBACK pin to

VREF pin, vs. frequency:

3574

LOGf

060410 1193

^hh

Where R

FB is in kW and f is in kHz.

To calculate the minimum R

START, which produces start-up at fMAX,

use the above equation with f = f

MAX from the equation relating

dead-time and f

MAX.

To set f

MIN, use the above equation with f = fMIN × 0.93. Where

0.93 is to ensure that, despite the worst case frequency tolerance

of -7%, the frequency can go below f

MIN, guaranteeing regulation

at V

BROWNOUT.

Using the resulting calculated value for R

FB, calculate RFMIN:

FMIN

START

The sum of R

FMIN and RSTART determines fMIN.

100

200

500

1000

100

300

Frequency (kHz)

LCS700-708 датащи(PDF) 15 Page - Power Integrations, Inc.

LCS700-708 датащи(HTML) 15 Page - Power Integrations, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

датащи скачать

ссылки URL