10

10 - 18

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Pin Number

Function

Description

Interface Schematic

1, 4, 9, 12

GND

These pins and the ground paddle must be connected to a

high quality RF/DC ground.

2, 3

LOP, LON

Differential LO input ports. This device may be driven in

either differential or single ended mode. In single ended

mode, one port should be driven by the LO source while

the other port may be terminated with a 50

Ω resistor to

ground. An external shunt 68

Ω resistor is used to improve

VSWR, while an external 100 pF capacitor is required

to prevent DC supply voltage from appearing on the

customer’s PC board.

5VB2

Bias Voltage for the LO stage. This voltage will affect the

Sideband Suppression, the Output Noise Floor and the

Power Consumption. The ideal voltage range for this port

is between +2.7 Vdc and +3.0 Vdc. The nominal current for

this port is 5.3 mA.

6, 7

Qn, Qp

Differential Quadrature baseband input. These are

high impedance ports. The nominal recommended bias

voltage is between 1.0 - 1.15V. The nominal recommended

baseband input voltage is 800 mV peak to peak differential.

By adjusting the DC bias voltage on ports Qn & Qp, the

Carrier Suppression of the device can be optimized for a

specific frequency band and LO power level. The typical

offset voltage for optimization is less than 5 mV.

The amplitude and phase difference between the I and Q

inputs can be adjusted in order to optimize the Sideband

Suppression for a specific frequency band

and LO power level.

8VB1

Bias Voltage for the output stage. This voltage should be

connected to the Vcc supply. Nominal supply voltage is 3.3

Vdc. The nominal current for this port is 2.4 mA.

10

N/C

No connect.

11

RFP

RF Output port. This port is matched to 50

Ω. A series

capacitor should be connected to this port in order to

prevent the DC supply voltage from appearing on the

customer’s PC board.

Pin Descriptions

SiGe WIDEBAND DIRECT

MODULATOR RFIC, 250 - 3800 MHz

v02.0705