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TJ2997GD датащи(PDF) 6 Page - HTC Korea TAEJIN Technology Co.

номер детали TJ2997GD
подробное описание детали  DDR Termination Regulator
PDF  13 Pages
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производитель  HTC [HTC Korea TAEJIN Technology Co.]
домашняя страница  http://www.htckorea.co.kr
Logo HTC - HTC Korea TAEJIN Technology Co.

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DDR Termination Regulator
TJ2997
Apr, 2011 - R1.0.1
6/13
HTC
achieved by connecting VDDQ directly to the 2.5V rail at the DIMM instead of AVIN and PVIN. This
ensures that the reference voltage tracks the DDR memory rails precisely without a large voltage drop
from the power lines.
VSENSE
The purpose of the sense pin is to provide improved remote load regulation. In most motherboard
applications the termination resistors will connect to VTT in a long plane. If the output voltage was
regulated only at the output of the TJ2997 then the long trace will cause a significant IR drop resulting in
a termination voltage lower at one end of the bus than the other. The VSENSE pin can be used to improve
this performance, by connecting it to the middle of the bus. This will provide a better distribution across
the entire termination bus. If remote load regulation is not used then the VSENSE pin must still be
connected to VTT. Care should be taken when a long VSENSE trace is implemented in close proximity to
the memory. Noise pickup in the VSENSE trace can cause problems with precise regulation of VTT. A
small 0.1uF ceramic capacitor placed next to the VSENSE pin can help filter any high frequency signals and
preventing errors.
ENABLE
The TJ2997 contains an active high enable pin that can be used to tri-state VTT. During shutdown VTT
should not be exposed to voltages that exceed AVIN. With the enable pin asserted low the quiescent
current of the TJ2997 will drop, however, VDDQ will always maintain its constant impedance of 100kΩ for
generating the internal reference. Therefore to calculate the total power loss in shutdown both currents
need to be considered. For more information refer to the Thermal Dissipation section.
VREF
VREF provides the buffered output of the internal reference voltage VDDQ / 2. This output should be
used to provide the reference voltage for the Northbridge chipset and memory. Since these inputs are
typically extremely high impedance, there should be little current drawn from VREF. For improved
performance, an output bypass capacitor can be used, located close to the pin, to help with noise. A
ceramic capacitor in the range of 0.1 µF to 0.01 µF is recommended. This output remains active during
the shutdown state for the suspend to RAM functionality.
VTT
VTT is the regulated output that is used to terminate the bus resistors. It is capable of sinking and
sourcing current while regulating the output precisely to VDDQ / 2. The TJ2997 is designed to handle
peak transient currents of up to ± 3A with a fast transient response at a certain operating condition. If a
transient is expected to last above the maximum continuous current rating for a significant amount of
time then the output capacitor should be sized large enough to prevent an excessive voltage drop.
Despite the fact that the TJ2997 is designed to handle large transient output currents it is not capable of
handling these for long durations, under all conditions. The reason for this is the standard packages are
not able to thermally dissipate the heat as a result of the internal power loss. If large currents are
required for longer durations, then care should be taken to ensure that the maximum junction
temperature is not exceeded. Proper thermal derating should always be used (please refer to the
Thermal Dissipation section). If the junction temperature exceeds the thermal shutdown point than VTT
will tri-state until the part returns below the hysteretic trip-point.



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